Add xo clock in sde_cesta for kera target. This will help
to vote for xo frequency during cesta idle time.
Change-Id: Ic4370c8a49ffbec2743c022e438280d371a5a968
Signed-off-by: Sailesh Reddy Male <quic_reddymal@quicinc.com>
Add display cesta related DT node on kera target. Move
the GDSC & MDP core clock from MDP to cesta node, as it
will be controlled through cesta. Add the cesta
related register offsets in trusted-vm DT.
Change-Id: I1f777f3402d8a4d7d57ca889206a4095447abb7d
Signed-off-by: Sailesh Reddy Male <quic_reddymal@quicinc.com>
Add XO clock to sde_cesta node. This will help to vote
XO freq for cesta idle vote for mdp-clk.
Change-Id: I33b309ed9ac2d9013fee8f071c5f07938e651e5f
Signed-off-by: Spurthy Mutturaj <quic_smuttura@quicinc.com>
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Add xo clock in sde_cesta for tuna target. This will help
to vote for xo frequency during cesta idle time.
Change-Id: I7cbf64c3121044d8976272bd690a718fda18a443
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
This change adds cesta to connectors list on MTP Harmonium, CDP
and QRD platforms.
Change-Id: I5a4bc421daf5a70ec0b67661d826c6adf5c31a80
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add display cesta related DT node on tuna target. Move
the GDSC & MDP core clock from MDP to cesta node, as it
will be controlled through cesta. Add the cesta
related register offsets in trusted-vm DT.
Change-Id: Ifa9f0b4500c5e6b453395bcf1de492e332d63306
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add XO clock to sde_cesta node. This will help to vote
XO freq for cesta idle vote for mdp-clk.
Change-Id: I33b309ed9ac2d9013fee8f071c5f07938e651e5f
Signed-off-by: Spurthy Mutturaj <quic_smuttura@quicinc.com>
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Update in Sharp qhd+ panel GPIO name
as per recent change from supplier in tuna.
Change-Id: I64422b2242d78b73a39ba30a4d5377cd442d20c9
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Reserves memory region to enable continuous splash
and ramdump on tuna target.
Change-Id: I0c2da9b0093923b83344e0bf3927022eceb30326
Signed-off-by: Sailesh Reddy Male <quic_reddymal@quicinc.com>
Enable DP support for MTP, QRD, and CDP platforms for Kera.
Change-Id: I78e1c0ffd842a4ebf0d73f9076c059591036dbaf
Signed-off-by: Mani Chandana Ballary Kuntumalla <quic_mkuntuma@quicinc.com>
This change adds cesta to connectors list on MTP Harmonium, CDP
and QRD platforms.
Change-Id: I5a4bc421daf5a70ec0b67661d826c6adf5c31a80
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Disable all the features of default panels for Kera SOD.
Change-Id: I6fc4aa4b5571e1145c46d9eb9ea129fa4c923b47
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Update DSI and panel supply voltage configuration
as per the recent change in the supplier regulators for Kera.
Change-Id: I512d381d4bf7e0a6b0d171736af872c7f45eeb74
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This change updates UBWC highest bank bit configuration
for kera target.
Change-Id: Ie0ef2bea85d9e2ce542cef4fa3de97ccf93596a0
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add display cesta related DT node on tuna target. Move
the GDSC & MDP core clock from MDP to cesta node, as it
will be controlled through cesta. Add the cesta
related register offsets in trusted-vm DT.
Change-Id: Ifa9f0b4500c5e6b453395bcf1de492e332d63306
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Reserves memory region to enable continuous splash
and ramdump on tuna target.
Change-Id: Ia50ffd92a35f13219877a73698ca6defa28dd2de
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Add sw fuse range to dts file for Tuna target. The swfuse_phys is only
needed in primary VM.
Change-Id: Ida97d23c3f0634864829ea8f7ea91e388062eb4c
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add sw fuse range to dts file for Kera target. The swfuse_phys is only
needed in primary VM.
Change-Id: If8e58f86f15960633c2e058342d15c307dcc738c
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add new dynamic clock types "adjust-hfp" and "adjust-vfp" to facilitate
specific hfp/vfp adjustment as per "qcom,dsi-dyn-hfp-list" and
"qcom,dsi-dyn-vfp-list" respectively corresponding to bit clock rates of
"qcom,dsi-dyn-clk-list". FPS might not be maintained in these cases.
Change-Id: Ic225624fb5e0bee0d8b099f2e955f65768371d4b
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This change updates UBWC highest bank bit configuration
for kera target.
Change-Id: Ie0ef2bea85d9e2ce542cef4fa3de97ccf93596a0
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Update DSI and panel supply voltage configuration
as per the recent change in the supplier regulators for Kera.
Change-Id: I512d381d4bf7e0a6b0d171736af872c7f45eeb74
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Enable touch support for Kera on CDP, MTP and QRD platforms.
Change-Id: Ica6505a62ca407001b6cbaaac8d5b738acd92fc7
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This change adds smmu_sde_unsec to connector list
for trustedvm platform in tuna target.
Change-Id: I86cba1f15319a502450f8b89b9bb96409869a821
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Enable 4-3-2 topology for both cmd and video mode on sharp 4k panel
for sun target.
Change-Id: I76dca958eea693d495c17320c56922f9a9ffa74b
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
