Commit Graph

2525 Commits

Author SHA1 Message Date
QCTECMDR Service
d9b2e0a9cd Merge "ARM: dts: qcom: Add cooling-cells for cpu in monaco" 2024-10-17 06:59:31 -07:00
Khaja Hussain Shaik Khaji
8892bda7c1 ARM: dts: msm: Correct imem child bus address map
Change imem node ranges to map imem address space to the
child node's address space correctly.

Change-Id: Ic4ec5cbf233011f48341b7c2788e1cf983a2dc7b
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-10-17 06:31:38 -07:00
Prem Sai Grandhi
e729238809 ARM: dts: msm: Add llcc perfmon node for tuna SOC
Add llcc perfmon entry, qdss clock node to
llcc perfmon driver and aoss_qmp headers.

Change-Id: I8f3b823f754bcf505c8441820cddfa03b5782305
Signed-off-by: Prem Sai Grandhi <quic_grandhir@quicinc.com>
2024-10-17 14:57:52 +05:30
Prasad Kumpatla
23ea0a9998 ARM: dts: qcom: add support for wcd usbss i2c slave on tuna
add support for wcd_usbss i2c slave and sdam interrupt
registration.

Change-Id: I03369812d52781c96a86922eb92a930da08f7833
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2024-10-17 01:54:00 -07:00
Kavya Nunna
d3c5fd0500 ARM: dts: msm: add primary SPMI Arbiter and SPMI debug bus for kera boards
Add spmi-pmic-arb devices for the primary and secondary SPMI buses
found on kera.  The primary bus operates at 19.2 MHz and is used
for most of the PMICs. The secondary bus operates at 4.8 MHz
and is used exclusively for charging PMICs. Note that the
secondary bus is not used so it is kept disabled.

Add SPMI debug device and associated child devices for the primary
SPMI interface. This provides consumers with unrestricted access
to the PMIC registers on pre-production devices. This helps
make debugging easier.

Change-Id: Idbb39999b00dd296419eb570b30083e208cf2bce
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2024-10-17 12:02:23 +05:30
QCTECMDR Service
9b96e0ba0b Merge "ARM: dts: msm: Add qfprom node for kera and tuna" 2024-10-16 19:16:25 -07:00
QCTECMDR Service
b3581787f2 Merge "ARM: dts: msm: Add medium cluster to perf core" 2024-10-16 19:16:25 -07:00
QCTECMDR Service
7a8e8a07a0 Merge "dt-bindings: Add rpm-stats-v2 dt binding" 2024-10-16 12:39:41 -07:00
QCTECMDR Service
16ddba06d8 Merge "ARM: dts: msm: Use reserved memory instead of CMA" 2024-10-16 09:05:07 -07:00
QCTECMDR Service
009ebfb867 Merge "ARM: dts: msm: Add CPUCP/SCMI node for Kera" 2024-10-16 09:05:07 -07:00
QCTECMDR Service
76b0ed9bbb Merge "ARM: dts: msm: Add clock and regulator for kgsl-smmu for kera" 2024-10-16 09:05:07 -07:00
QCTECMDR Service
7d714ec8e9 Merge "ARM: dts: msm: Add gic-interrupt-router for kera and tuna" 2024-10-16 09:05:07 -07:00
QCTECMDR Service
cb1489ed60 Merge "ARM: dts: msm: Set vCPU affinity to CPU0 for VMs on Tuna" 2024-10-16 09:05:07 -07:00
QCTECMDR Service
0a06c817f5 Merge "ARM: dts: msm: Add spi, i2c, gpi nodes for SVM tuna" 2024-10-16 09:05:07 -07:00
Souradeep Chowdhury
ecf75bb5d7 ARM: dts: msm: Add qfprom node for kera and tuna
Add qfprom node for kera and tuna.

Change-Id: I2fc32aebc58b6793cb9be896b4dd1dc8734a05a8
Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
2024-10-16 08:26:18 -07:00
Nitin Rawat
167166ab42 ARM: dts: msm: Add medium cluster to perf core
Currently cpufreq delayed work is queued with delayed
timer as 30ms. On expiry, we monitor load and then
enable storage boost feature if load exceeds certain
predefined threshold.

Unlike pineapple, we are monitoring the load request only
on prime/large cluster and not on medium cluster.
This is causing some additional delay to reach the
threshold required to enable storage boost feature.

Benchmark tools like Antutu completes read or write IO
within 120-130ms which mean any small delay can impact
Antutu to large extent. Hence add medium clusters to perf
score similar to pineapple so that load on medium cluster
along with large cluster is considered.

This will decrease the window time to reach the threshold
to start the storage boost and hence improve Storage
benchmark performance.

Change-Id: I8563cffc4da8fa7729d38fc71c8996b20b79b1ec
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
2024-10-16 07:22:43 -07:00
Sneh Mankad
b89277fa9f ARM: dts: msm: Add stats and sys-pm-vx nodes for kera
Add qcom sleep stats, rpmh stats nodes to enable
cpu and soc stats. Also add sys-pm-vx node.

Change-Id: If29d34169b2adeab6843d010325f59787727f999
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2024-10-16 17:47:43 +05:30
Sneh Mankad
63a7ad9b53 bindings: arm: msm: Document sys-pm-violators compatible for kera
Document sys-pm-violators compatible for kera.

Change-Id: I86fe8ca8e49bf7f8e8e78983f74e58eb838ad6d2
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2024-10-16 17:45:04 +05:30
Sneh Mankad
dc5d86c9d3 ARM: dts: msm: Update subsystem stats node for tuna
This change updates subsystem stats node according to latest
version.

Change-Id: I638652beb177156d73fd1608f69d956b54b75cae
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2024-10-16 17:36:14 +05:30
Raghavendra Kakarla
b813022cd5 dt-bindings: Add rpm-stats-v2 dt binding
This change adds the rpm-stats-v2 to the
rpm-stats dt binding.

Change-Id: I02d04d33347ea73ee29f59e0ca5691ecbb5b96fd
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2024-10-16 04:16:42 -07:00
Raviteja Laggyshetty
aa7d69fbcd dt-bindings: interconnect: Add interconnect bindings for KERA
Add interconnect device bindings for KERA SoC. These devices
can be used to describe any RPMH and NoC based interconnect devices.

Change-Id: I757a0dd285190be94f2aafa15daf70218121bb03
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
2024-10-16 03:29:10 -07:00
Sneh Mankad
88163abf2e ARM: dts: msm: Modify PDC node for kera
This change corrects the PDC irq mapping configuration.

Change-Id: Ia0fc89d2ac90cf1e5ebf07f28e6ab042202fd41d
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2024-10-16 15:21:03 +05:30
Raghavendra Kakarla
84e0391a4e ARM: dts: msm: Update qcom stats node for Monaco
This change updates the qcom stats node with proper
compatible string. Also, removes the subsystem-sleep-stats
and qcom,rpm-master-stats nodes which are deprecated.

Change-Id: I71b653ef539ccc757f4fb79413c539bbdee56d53
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2024-10-16 01:52:22 -07:00
QCTECMDR Service
f11bc10923 Merge "ARM: dts: qcom: Add few nodes to optimize bootup time" 2024-10-15 23:52:16 -07:00
QCTECMDR Service
0847f3386e Merge "ARM: dts: msm: Add BOB regulator for tuna" 2024-10-15 23:52:16 -07:00
QCTECMDR Service
f32d3e6fa9 Merge "ARM: dts: msm: Add glink egde for adsp, modem and cdsp" 2024-10-15 23:52:16 -07:00
QCTECMDR Service
83aa91b894 Merge "ARM: dts: msm: Update tlmm-vm-gpio-list for parrot vm" 2024-10-15 23:52:16 -07:00
Prasanna S
f1bff316cc ARM: dts: msm: Add spi, i2c, gpi nodes for SVM tuna
Adding spi, i2c, gsi nodes for SVM tuna.

Change-Id: I3c534c3e68573e34541c5681bea609ac44f28af2
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
2024-10-16 11:05:57 +05:30
QCTECMDR Service
f6063d4eda Merge "ARM: dts: qcom: Add PMIC PON log device for tuna" 2024-10-15 19:17:54 -07:00
QCTECMDR Service
ac7c3d647a Merge "ARM: dts: msm: Enable virtio-mem device for oemvm on tuna" 2024-10-15 19:17:53 -07:00
QCTECMDR Service
58e6e37499 Merge "ARM: dts: msm: Remove clocks property form CPU nodes" 2024-10-15 19:17:53 -07:00
Souradeep Chowdhury
d6f1bceb5c ARM: dts: msm: Add gic-interrupt-router for kera and tuna
Add the gic-interrupt-router for kera and tuna.

Change-Id: I86164eed35857f93eabe32c1383733a723929920
Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-10-15 00:17:54 -07:00
Sayantan Chakraborty
1076194f99 ARM: dts: msm: Add CPUCP/SCMI node for Kera
Add device nodes for the cpucp mailbox, cpucp logs,
and SCMI nodes for Kera.

Change-Id: Ia787f5f2b6fd739df0be380946beadef1963a0e9
Signed-off-by: Sayantan Chakraborty <quic_saycha@quicinc.com>
2024-10-15 12:26:10 +05:30
Yingchao Deng
42ef810658 ARM: dts: msm: Use reserved memory instead of CMA
On qcom-6.6, the memory reserved for memory_dump_v2 should be
configured as reserved memory instead of CMA.

Change-Id: I181b9fc4431838879d3bb99ceafd4512bcf5914e
Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com>
2024-10-14 23:40:21 -07:00
Vijayanand Jitta
8d54d3baa8 ARM: dts: msm: Add mem-offline device for tuna
Add the device-tree node for the mem-offline driver to enable
memory offlining and convey the sizes of the offlineable memory.
Describe the communication channel used to communicate with the
firmware which supports onlining and offlining of memory.

Change-Id: I448969b10b0e29f44ca2b7949472ea21c63ffb3a
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-15 12:03:11 +05:30
Nitesh Kumar
1402955d21 ARM: dts: qcom: Add cooling-cells for cpu in monaco
Add cooling-cells for the CPU sensors in monaco.

Change-Id: I6ef6acac51952effd6de820b6384401feeb610b4
Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com>
2024-10-15 10:48:31 +05:30
Vijayanand Jitta
01b2b643b1 ARM: dts: msm: Add interconnect properties for smmus for kera
Enable bus bandwidth voting by adding interconnect properties
for kgsl and apps smmu on kera.

Change-Id: If660a410212cc6f4ad8e304ba47123bab11e9439
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 20:42:30 -07:00
Minghao Zhang
0e8dcbc9fe dt-bindings: thermal: Document pm8550 compatible for bcl pmic5
This change documents pm8550 compatible for bcl pmic5.

Change-Id: Ie3528f91d5ebec8c601ec4fc9bbd8037df824b3c
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
2024-10-14 19:46:30 -07:00
Kavya Nunna
61d2ada8fd ARM: dts: qcom: Add PMIC PON log device for tuna
Add a PMIC PON log parser device which reads the log stored in
PMK8550 SDAM5 and SDAM6.

while at it add a dependency between the gh-watchdog and
pmic-pon-log devices for tuna boards.  This ensures that
during system boot-up, the driver responsible for the
gh-watchdog device initializes before the one
responsible for the pmic-pon-log device.

Change-Id: I5e2c13807570e5a2e1740e9160cce626fa9004c6
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2024-10-15 07:58:33 +05:30
Vijayanand Jitta
db4d2f168b ARM: dts: msm: disable slub debug for sun
Disable slub debug option through command line for sun.

Change-Id: Ide22d13c6a39e9a6ade53435c3e1072efd493206
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 09:36:16 -07:00
Vijayanand Jitta
756274e4cc ARM: dts: msm: Add clock and regulator for kgsl-smmu for kera
Add clock and regulator which would be required for
register accesses of kgsl-smmu for kera.

Change-Id: I27045fc113f9bc2aa56455caae568f66253adf62
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 16:37:53 +05:30
Vijayanand Jitta
a7ce6b1cb4 ARM: dts: msm: Enable virtio-mem device for oemvm on tuna
Describe the properties of the memory region virtio-mem supports.
Also reserve the IPA space for dmabuf buffers.

Change-Id: I6baa1a7d00b26f1a885e9c85c57b7c30745dd5f6
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 02:17:22 -07:00
Vijayanand Jitta
3c86c8cc2a ARM: dts: msm: Enable virtio-mem device for tuna-vm
Describe the properties of the memory region virtio-mem supports.
Also reserve the IPA space for dmabuf buffers.

Change-Id: Iad6b41033884828a734aa8562dc3e4d45997968b
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 02:17:15 -07:00
Vijayanand Jitta
eb791d346b ARM: dts: msm: Add mem-buf device on oemvm
Describe the properties and msgqs of the mem-buf device.

Change-Id: Ie05f273fd3747d4bf7a071ad5addae285ab612b4
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 02:17:07 -07:00
Vijayanand Jitta
e617a3fe0c ARM: dts: msm: Add mem-buf device on tuna-vm
Describe the properties and msgqs of the mem-buf device.

Change-Id: I66e4847e8c141c917f3bda22663fc60e2634917a
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 02:16:45 -07:00
Vijayanand Jitta
689ef8fa7f ARM: dts: msm: Add dma-buf heaps for tuna-vm
Describe the available dma-buf memory pools on tuna-vm.

Change-Id: Ia2bb3fff1f76a04c4f8a14b51917b59d029f8d5e
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 13:48:55 +05:30
Vijayanand Jitta
215c835038 ARM: dts: msm: Add arm-smmu device on tuna-vm
Describe the register, interrupts, and settings of the arm-smmu device.

Change-Id: I8876e31db9cd232963987599c40d0d1b37e35f08
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2024-10-14 13:39:09 +05:30
Kavya Nunna
19d43b329c ARM: dts: msm: Add BOB regulator for tuna
Add BOB regulator for tuna platforms so that clients can access
the regulator and vote on it.

Change-Id: Idd57e09c29eb1ef0b9a73f2ef9e64beae5040676
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2024-10-13 23:41:45 -07:00
Hrishabh Rajput
5acf7ffca0 ARM: dts: msm: Add trustedvm and oemvm support for Kera
Add device-tree nodes required to support trustedvm and oemvm on Kera.

Change-Id: I7b978c5c166a4e00dcbc68c1ef6884f9ddeba72c
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
2024-10-14 11:29:31 +05:30
Hrishabh Rajput
3e2858be87 ARM: dts: msm: Add chipinfo region as ext-region for cpusysvm
Add chipinfo region as ext-region for cpusysvm for Kera.

Change-Id: Id353eece5d4b825c75775f1c5be7201260007c1c
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
2024-10-14 11:19:33 +05:30