Update "capacity-dmips-mhz" for tuna. It is used to build Energy Model
which in turn is used by EAS to take placement decisions.
Change-Id: If4c0886b8a683e63f32f700f53968a1e2dbd1e42
Signed-off-by: Ankit Sharma <quic_anshar@quicinc.com>
Add QUPv3(I2C, SPI and UART) and GPI DT nodes on kera.
Change-Id: I3d0db10cd90a59500b29aade5cb9e4017395a1a0
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
Add all 3 PCIe RC configurations for sdxkova. The number of address
cells and size cells are seen as 2 in msm-imem. Based on this add the
register base addresses, MSI register addresses, Host address in ranges
as 64-bit addresses.
Update the PHY settings from latest HSR.
- For PCIe0 and PCIe1 there are no changes in PHY settings, update
the corresponding PHY versions to v1.11 and v1.12.
- For PCIe2, add one change (PCS_G3S2_PRE_GAIN) as per the PHY
version v1.5.
Change-Id: I09519045a13e96878046d905bbe6f2378578c464
Signed-off-by: Sai Chaitanya Kaveti <quic_skaveti@quicinc.com>
To access gpios from apps and adsp, we have added apps and
remote flag in dtsi. To identify apps is busy or not, added
qcom-apps flag during active state and added qcom-remote flag
during suspend state, so other SS can use gpios during apps
in suspend state. This flags in pinctrl file for respective
GPIOs will help eGPIO to work for AON camera usecase.
Also, increase TRE size from 64 to 1024 for camera usecase.
Change-Id: Ibc65d9e61d55a3eaeffdf78aef3f8852687f576f
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
Add base device tree support for MTP harmonium and MTP NFC
platforms for Tuna SoC.
Change-Id: I4cef3297884dff5e7edee9121496c7284551c99c
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
As now interconnect changes are in place, add interconnect voting
for remote processors.
Change-Id: I8a1016f0fe760b49aa88dd51bbb00ef7fdf785fb
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Add NVMEM cell for FMD_CONT_AFTER_PON to provide the option to prevent
FMD(find-my-device) feature disablement on PON trigger.
0 - Disable FMD feature on PON.
1 - Keep FMD feature enabled on PON.
Change-Id: I5e5386867546aacf526fe7be65e1e1e1ece30ffc
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
Add test nodes for Tuna Trusted VM and OEMVM.
Change-Id: I9b7fe8d547f764e5917e48ef36f9727018a8fb79
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add support for interconnect for sdxbaagha platform.
Change-Id: Ia59ecee142ff7bc4583e44b1e92a6bdcb592a337
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Update the TUNE_USB2_SQUELCH_U register (0xFD54) to a value of 0x4 in
the MTP platform’s override sequence. This adjustment addresses the
current issue of excessive RX sensitivity, which causes the device to
misinterpret noise as valid high-speed USB signals, leading to frequent
USB disconnections.
By increasing the squelch level, we enhance the precision of USB signal
detection, reducing false positives and improving overall USB stability.
Change-Id: Ifcd680e3c95170d168f693b4a6fd63aefe6c41d6
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Some target require refgen to operate. For this an additional ldo
which will be exposed and the driver need to vote for proper phy
functionality.
Add a phandle which will be used in the driver to identify the
ldo and vote accordingly.
Change-Id: I15b3bcb031cefe037fbb0364bfb7b87d26489006
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
GLINK PKT provides a userspace interface to RPMSG GLINK through
character device node. Add the nodes and corresponding channel
devices to enable GLINK communication from userspace.
Change-Id: Ie880b3806843fcf57fbb2f77a2d77e24ee7359b6
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Add the nodes for enable qrtr communication between primary vm and
oemvm on tuna.
This adds platform devices and vdevice descriptions to start the
qrtr gunyah transport on both primary vm and oemvm device trees. This
also adds the device tree node to configure qrtr as node id 21 on oem
vm.
Change-Id: I8697478e2e1b8269aa3b93f940a8c98f03b7c9b2
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
