ARM: dts: msm: tuna: Update capacity property
Update "capacity-dmips-mhz" for tuna. It is used to build Energy Model which in turn is used by EAS to take placement decisions. Change-Id: If4c0886b8a683e63f32f700f53968a1e2dbd1e42 Signed-off-by: Ankit Sharma <quic_anshar@quicinc.com>
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@@ -154,7 +154,7 @@
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#cooling-cells = <2>;
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cpu-release-addr = <0x0 0xE3940000>;
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next-level-cache = <&L2_2>;
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capacity-dmips-mhz = <1035>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <121>;
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L2_2: l2-cache {
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compatible = "cache";
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@@ -175,7 +175,7 @@
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#cooling-cells = <2>;
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cpu-release-addr = <0x0 0xE3940000>;
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next-level-cache = <&L2_3>;
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capacity-dmips-mhz = <1035>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <121>;
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L2_3: l2-cache {
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compatible = "cache";
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@@ -196,7 +196,7 @@
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#cooling-cells = <2>;
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cpu-release-addr = <0x0 0xE3940000>;
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next-level-cache = <&L2_4>;
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capacity-dmips-mhz = <1035>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <121>;
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L2_4: l2-cache {
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compatible = "cache";
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@@ -217,7 +217,7 @@
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#cooling-cells = <2>;
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cpu-release-addr = <0x0 0xE3940000>;
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next-level-cache = <&L2_5>;
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capacity-dmips-mhz = <1035>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <121>;
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L2_5: l2-cache {
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compatible = "cache";
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@@ -238,7 +238,7 @@
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#cooling-cells = <2>;
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cpu-release-addr = <0x0 0xE3940000>;
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next-level-cache = <&L2_6>;
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capacity-dmips-mhz = <1035>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <121>;
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L2_6: l2-cache {
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compatible = "cache";
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@@ -259,7 +259,7 @@
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#cooling-cells = <2>;
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cpu-release-addr = <0x0 0xE3940000>;
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next-level-cache = <&L2_7>;
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capacity-dmips-mhz = <1178>;
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capacity-dmips-mhz = <1157>;
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dynamic-power-coefficient = <295>;
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L2_7: l2-cache {
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compatible = "cache";
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