Add ddr-regions device tree node in Tuna and Kera to optimize
boot-up time as firmware will look for this node during boot
and if it finds it early, it will save some time in bootup.
Change-Id: If3d6f3be7331870b5ecec9834de1dbebfbb6c22f
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
Previous commit c0ad941ff4 ("ARM: dts: msm: Add bootargs for tuna
and kera") reverted couple of other change due to merge conflict
and merge itself. Add the affected change again to fix the issue.
Change-Id: I469075244ad34f13ea7004baae9d9423ebc4584d
Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Add support for cpufreq_hw and cpufreq_hw_debug nodes on tuna platform.
While at it, set the default governor to performance on tuna platform.
Change-Id: I2a0b89d51a16c479da35ca60286b2df18c3fba55
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Add initial set of DCVS device nodes for Tuna. This
includes the QCOM DCVS devices, PMU device memlat device
nodes and mapping tables, and bwmon device nodes.
Change-Id: I3abb2b912f22198f375635f0214bdbd0e71d5d5a
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Mark dispcc clock node as GenPD provider and disable the
display GDSC regulator nodes for tuna platform.
While at it, keep the gdsc regulator nodes as it is on rumi platform.
Change-Id: Ia1ee65d9958ba8ab6cb00616a09cd5b2304bc31a
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Remove #address-cells and #size-cells properties from the cpucp
node as they are identical to those in the parent node,
allowing them to be inherited.
Change-Id: Ief29334722acf4e525d4d510a54840c26d3e594a
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Add dsi_pll_codes and disp_rdump_region nodes in the
beginning of devicetree to optimize the bootloader
search for these nodes during bootup which reduces
bootup time.
Change-Id: I7b7fe798a9d0daf306d76bc34132574ba6e0e88e
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
Add qcom,hbst-ovp-trim property as an option for SW to trigger hBoost
OVP trim sequence. The sequence adjusts certain trim registers and
reduces hBoost voltage stepper rate. The adjustment can help in preventing
hBoost overshoots that might trigger OVP and potentially lead to the
shutdown of haptics driver.
Change-Id: I8e1e84053015e6aec46d1ba874243e66acb2d23a
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
Add pmd802x support for tuna mtp platforms.
While at it add pm7550ba thermal zones and other pm7550ba support.
Change-Id: Ia34757eecea578b454c83c24610d8bdb31e2836b
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Fix the SDC2 GPIO pin function names to match the tuna-pinctrl driver.
The function name like "SDC2_CMD" was incorrectly written as "sdc2_cmd"
and etc. This alignment ensures proper functioning.
Change-Id: I4fd35d3c7d4fbdf0ee1bc32ad81efc3088529265
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add RPMH regulator devices for SMPS, LDO regulators,
found on the PMIC chips used on tuna boards, to ensure that
consumers are able to modify the physical state of these regulators.
Change-Id: Ie30bbc8ab04d75246a5ff902841981c907dc9fca
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Adding a 4-byte register entry for tcsr_dyn-en-dis to enable/disable USB
dynamically from dwc3-msm-core.
Change-Id: I34163cf381ff92d90dc687817612f0f191407501
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Adding the necessary audio node providing the necessary
resources of the qmi audio to get probed.
Note: SID for usb audio is 100B.
Change-Id: Ib55eb5957d38e8551c2a2bda5446fc64539203e1
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
QMP phy is used for SS/SSP usb usecases as well as DP use cases
in a target. This change adds the basic resources required along
with the init sequence for functionality.
Note: init sequence is following Kalama QMP init sequence and
ref_clk is set to 38.4 Mhz.
Change-Id: I9422f9af88801fa0dde4d79a7e72ec74e264420d
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Even though we use proxy scheduling, during VM bootup hypervisor tries
to boot the VMs as per the affinity-map. This may cause panic in case a
CPU within affinity-map is unavailable.
Affining vCPUs to CPU0 makes sure VM proceeds with
powered-ON sequence, assuming CPU0 is always available.
Change-Id: Ia6799445891e1b003b5055178adb50778bade863
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add support for rpmh clock controller nodes on TUNA platform.
While at it, keep rpmhcc node as dummy for TUNA rumi platform.
Change-Id: I97b2a42df7886295efd8b4a176257fe45a571bae
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
