Commit Graph

293 Commits

Author SHA1 Message Date
Prudhvi Yarlagadda
686f88670d ARM: dts: msm: Correct the pcie1 dt property names on pineapple
Correct the following pcie1 dt property names on pineapple
device as they are modified for this latest kernel devicetree
documentation.

clock-frequency -> qcom,pcie-clock-frequency.

Change-Id: I048275f388f31fe71b157f1f9ab4aaf5eec6131b
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
2023-10-04 14:17:56 -07:00
Marc Guillaume
1006b28674 ARM: dts: qcom: Adding msm_sharedmem DT entry for lanaiDevSp
LanaiDevSp counterpart of following change:
commit d678c24cfe ("ARM: dts: qcom: Adding msm_sharedmem DT entry").

Change-Id: I52fe8cf5e2d2a2e85562a5cf9e8eed971d3c600d
Signed-off-by: Marc Guillaume <quic_mguillau@quicinc.com>
2023-10-04 11:31:15 -07:00
Unnathi Chalicheemala
04b52df658 ARM: dts: msm: Fix the base addresses of LLCC banks for Sun SoC
Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.

Change-Id: I1d2b758693f6a71338653fa677dbb833299475c6
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
2023-10-04 09:36:56 -07:00
Unnathi Chalicheemala
d9c5c5ed56 ARM: dts: msm: Fix the base addresses of LLCC banks for Pineapple SoC
Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.

Change-Id: I7c2b62697721074660c6b7371e0d2b1bf195ba5d
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
2023-10-04 09:25:59 -07:00
Anjelique Melendez
fd47ab2bae ARM: dts: qcom: add volume up gpio-keys device for Sun boards
Add a gpio-keys device for Sun MTP, CDP and QRD boards that use
PM8550 GPIO 6.

Change-Id: I3b6ec4f7cb826cd482e85cdbbcbea3db485284c1
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2023-10-03 11:36:20 -07:00
Anjelique Melendez
e6efa9e825 ARM: dts: qcom: Add LPG LED device for Sun
Add the LPG LED device for sun platforms. Currently, pm8550 LED
devices use the downstream leds-qti-tri-led driver. Update the LED
devices so that they use the upstream leds-qcom-lpg driver.

Change-Id: I6e9c80d9e7725e5978fbc8bebf02a7d66968d32e
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2023-10-03 11:28:38 -07:00
Gokul krishna Krishnakumar
989e04083d ARM: dts: msm: sun: Disable GPU node
Temporarily disable the GPU node causing access violation in 0x3dc0000.

Change-Id: I2759a37c36a9c6f62a94e23237f361a80680d3c4
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2023-10-03 09:36:24 -07:00
Melody Olvera
f7ace16966 ARM: dts: msm: Add nodes for minidump for sun
Add minidump nodes for sun SoC.

Change-Id: Iebcd2ceaeefceff7d60448d62ad6a98c4fa2d433
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
2023-10-02 14:29:06 -07:00
Mike Tipton
0823b72d1b ARM: dts: msm: Make gx_clkctl_gx_gdsc depend on gpucc for Sun
The clock required to access this GDSC depends on a clock coming from
GPU_CC, which is enabled by default in gpucc probe. Add a phandle to
gpucc to ensure it probes first and enables the required clock.

Change-Id: I5aae1a6a1a3615cf1a8227b839a721a6af945243
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
2023-10-02 13:58:05 -07:00
Prudhvi Yarlagadda
429926ac86 ARM: dts: msm: Correct the pcie dt property names on pineapple
Correct the following pcie dt property names on pineapple
device as they are modified for this latest kernel devicetree
documentation.

qcom,pcie-clkreq-gpio -> qcom,pcie-clkreq-pin.
clock-frequency -> qcom,pcie-clock-frequency.

Change-Id: I79454ef04a69d5427e32c45042304809cdcb886c
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
2023-09-29 11:40:33 -07:00
Hrishabh Rajput
87fdadbcb4 ARM: dts: msm: Enable tlmm VM mem nodes for Pineapple
Enable tlmm VM mem access device tree nodes for Pineapple.

Change-Id: I2bfbc22e8f9e933e3d0ec419b3fa67ff89b4fdad
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
2023-09-28 14:54:46 +05:30
Anjelique Melendez
0720a9afe6 ARM: dts: qcom: add PMIC devices for Sun
Add top level SPMI slave devices for PMD802x, PMIH010x, PM8550VE and
PM8550VS.

Change-Id: I7658cd5e9bb0c2801db10029380cb7a76a97abff
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2023-09-27 16:55:41 -07:00
Anjelique Melendez
ea8a9577b5 ARM: dts: qcom: Prepare to add PMIC devices for Sun
Sun and pineapple share certain PMICs. Prepare the shared PMIC devices
to be used for both Sun and Pineapple.

Change-Id: I378e781751b4ee42b3c0d4940dff30ffbd2b3e5a
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2023-09-27 16:55:09 -07:00
Unnathi Chalicheemala
0ac00846bb ARM: dts: msm: Add support for Sun SoC + Kiwi
Add device tree files needed to support Sun SoC + Kiwi platforms.

Change-Id: Ie27eea504087f8da315ab6b0e90d1660d32e3815
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
2023-09-26 08:59:11 -07:00
qctecmdr
4c5cd691e3 Merge "ARM: dts: qcom: Add device tree entries for QTEE drivers" 2023-09-25 16:21:10 -07:00
David Collins
0d4bfb44d3 ARM: dts: qcom: add SPMI bus controller for Sun
Add spmi-pmic-arb devices for the primary and secondary SPMI buses
found on Sun.  The primary bus operates at 19.2 MHz and is used for
most of the PMICs.

The secondary bus operates at 4.8 MHz and is used exclusively for
charging PMICs.  Note that the secondary bus is not connected to
the SoC on the board due to voltage level differences.  Therefore,
keep the secondary bus device disabled.

Change-Id: I6b2bb6b54e285fd9c333971b08134c3768087869
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
2023-09-25 13:47:53 -07:00
Meena Pasumarthi
ba5f42abbc ARM: dts: msm: Add base TUIVM and OEMVM for Sun
Add base TUIVM and OEMVM device tree support for Sun RUMI platform.

Change-Id: I32598ce2c3488658e2c9caf0cd7a2368665c0b06
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
2023-09-25 09:50:18 +05:30
Meena Pasumarthi
02930b3391 ARM: dts: msm: Add base TUIVM and OEMVM for Pineapple
Add base TUIVM and OEMVM device tree support for all Pineapple platforms.

Change-Id: I7c3cc2112e122f25a2f0b573128e8fdfb86975c5
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
2023-09-25 09:49:10 +05:30
Anmolpreet Kaur
ffce3361b2 ARM: dts: qcom: Add device tree entries for QTEE drivers
Add device tree entries for smcinvoke, shmbridge and tz-log
drivers and qseecom heaps.

Change-Id: I1a427c66e12a02532097db352a1d26fe5ececb9f
Signed-off-by: Anmolpreet Kaur <quic_anmolpre@quicinc.com>
2023-09-23 21:26:44 -07:00
Lazarus Motha
6e6d4bacc1 ARM: dts: msm: Add PCIe Root port configuration for sun
Add initial devicetree nodes and entries to support
PCIe RC0 port configuration on sun.

Change-Id: I3b7419bfd376a51388785cc4e2f9702ddaabe397
Signed-off-by: Lazarus Motha <quic_lmotha@quicinc.com>
2023-09-22 14:21:32 -07:00
qctecmdr
c3ebfa0666 Merge "ARM: dts: msm: add coresight component DT file for sun" 2023-09-22 13:30:55 -07:00
qctecmdr
46ceb889f4 Merge "ARM: dts: qcom: Add TSENS device for sun" 2023-09-22 10:10:39 -07:00
Gokul krishna Krishnakumar
db32d03865 ARM: dts: qcom: Add crmb/crmc to cesta device for pineapple
Add crmb and crmc register space for cesta devices on pineapple.

Change-Id: Ia8ec195ca1683e652b31a5daa2ab271e8bcec321
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2023-09-20 14:28:36 -07:00
Yuanfang Zhang
2964e2edd2 ARM: dts: msm: add coresight component DT file for sun
Add coresight component devicetree file for sun.

Change-Id: I28b8b6a2142fc89ed457553f039eca785064007b
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
2023-09-19 23:21:39 -07:00
Subbaraman Narayanamurthy
f07fa996b6 ARM: dts: qcom: Update pmic_glink device compatible string for pineapple
Since we use downstream pmic_glink drivers, use the right compatible
string for pmic_glink devices on pineapple to support battery
management.

Change-Id: Ia6375ec2c938149dd31ae073b906b1c09b37b21e
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
2023-09-18 17:21:51 -07:00
qctecmdr
9ffd7a80ef Merge "ARM: dts: qcom: Adding msm_sharedmem DT entry" 2023-09-15 14:41:22 -07:00
qctecmdr
11ec13ccb4 Merge "ARM: dts: msm: Add GCC phandle to GDSC driver for Sun" 2023-09-14 14:43:45 -07:00
qctecmdr
5824a01a26 Merge "ARM: dts: msm: Add interconnect properties for apps_smmu for sun" 2023-09-14 14:43:45 -07:00
qctecmdr
8355d2ecbd Merge "ARM: dts: qcom: keep VDD_MMCX and VDD_MXC supplies always on for Sun RUMI" 2023-09-14 12:52:12 -07:00
qctecmdr
75dc06d124 Merge "dt-bindings: Add aliases label" 2023-09-14 12:52:12 -07:00
Rashid Zafar
2d5aaa7b2b ARM: dts: qcom: Add TSENS device for sun
Add TSENS device and respective TSENS thermal zone configuration for
sun.

Change-Id: I41d2d44d7898c60fc600d34306ef5e107e3fe15c
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2023-09-13 12:11:22 -07:00
Vivek Aknurwar
3ad392617c ARM: dts: msm: Add GCC phandle to GDSC driver for Sun
GCC needs to probe before GDSC regulator driver as driver will be
unable to read registers without required gcc config ahb clocks. These
config ahb clocks are enabled in GCC probe. Thus GCC needs to probe
before GDSC driver. Adding GCC phandles to sequence the probe order
during kernel boot.

Change-Id: Icd13d18f07540f96cb4175edc5bd41526b6a3841
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
2023-09-12 13:46:16 -07:00
Marc Guillaume
d678c24cfe ARM: dts: qcom: Adding msm_sharedmem DT entry
Port of the DT entry which provides configuration settings for the
msm_sharedmem driver. This is needed for correct operation of
MPSS RFS/EFS.

Change-Id: Ic08e19398f10908920f8ac1d7e4670109de5e356
Signed-off-by: Marc Guillaume <quic_mguillau@quicinc.com>
2023-09-11 16:54:32 -07:00
Eric Rosas
1e720dfa08 dt-bindings: Add audio codec bindings for sun
Add bindings for WCD and WSA in pinctrl dt
file for sun.

Change-Id: Icb1fd6fb5950c5814cb4039d369647baac93ddf3
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-09-08 16:19:40 -07:00
Eric Rosas
f66ad61238 dt-bindings: Add aliases label
Audio kernel depends on the aliases label being defined
from the top level. Add label to aliases node to allow
for proper compilation of audio kernel.

Change-Id: Idb88dd470ca0dec31670adef8546e34fee14a4d7
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-09-08 14:24:12 -07:00
Patrick Daly
554a5c2bd0 ARM: dts: msm: Add interconnect properties for apps_smmu for sun
Enable bus bandwidth voting.

Change-Id: I6888e60c4bf9dc06a0361b94424ce75977b887ab
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2023-09-08 10:01:32 -07:00
Patrick Daly
50b0262199 ARM: dts: msm: Add smmu ACLTR values for sun
Configure per-context bank pre-fetch settings.

Change-Id: I6e30bf2f202ab5e550dbb14b05311f4d775c3d46
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2023-09-08 10:01:32 -07:00
Patrick Daly
ca8abb5d41 ARM: dts: msm: Add kgsl_smmu for sun
Describe the registers and interrupts of the kgsl_iommu device.

Change-Id: I632cdb3f204dda4af32829c0e373c15065f87af9
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2023-09-08 10:01:32 -07:00
qctecmdr
10e42d9078 Merge "ARM: dts: msm: Define adsp_mem_heap region" 2023-09-07 08:17:19 -07:00
qctecmdr
86bdd50b20 Merge "ARM: dts: msm: Add smp2p for sun" 2023-09-06 17:54:55 -07:00
qctecmdr
51d6612124 Merge "ARM: dts: msm: Unstub Videocc for Sun" 2023-09-06 16:31:04 -07:00
qctecmdr
21f9c92153 Merge "ARM: dts: msm: Unstub Cambistmclkcc on Sun" 2023-09-06 16:31:04 -07:00
qctecmdr
53b2837ffd Merge "ARM: dts: msm: Unstub tcsrcc for Sun" 2023-09-06 16:31:04 -07:00
qctecmdr
682b8230cf Merge "ARM: dts: msm: sun: Add EUD node for sun SoC" 2023-09-06 16:31:03 -07:00
qctecmdr
2d890362b9 Merge "ARM: dts: msm: Add bi_tcxo_ao phandle for CCs on Sun" 2023-09-06 14:54:56 -07:00
Xubin Bai
6c074a4b4c ARM: dts: qcom: keep VDD_MMCX and VDD_MXC supplies always on for Sun RUMI
Set regulator-always-on for VDD_MMCX and VDD_MXC on Sun
RUMI. This ensures that clock controller register values
are maintained since RUMI isn't simulating register
retention across VDD_MMCX or VDD_MXC power collapse.

Change-Id: I5adaa243066df64f6f04f569a05eb124734d7611
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
2023-09-05 10:57:57 -07:00
Anirudh Raghavendra
ad2a8bc603 ARM: dts: msm: Define adsp_mem_heap region
Define adsp mem heap region for adsp-mem device. Also
add documentation for the same.

Change-Id: Icce88b87c28797ff51ba5b0d885706d3a903eee3
Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com>
2023-09-05 10:56:16 -07:00
qctecmdr
6fd4d30426 Merge "ARM: dts: msm: Unstub gpucc for Sun" 2023-09-01 03:09:39 -07:00
qctecmdr
830e38f129 Merge "ARM: dts: msm: Remove usb-role-switch for pineapple" 2023-08-31 15:36:39 -07:00
qctecmdr
8bdd062bb3 Merge "ARM: dts: qcom: Update flash led compatible for Pineapple files" 2023-08-31 12:34:05 -07:00