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ARM: dts: msm: Add kgsl_smmu for sun

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Describe the registers and interrupts of the kgsl_iommu device.

Change-Id: I632cdb3f204dda4af32829c0e373c15065f87af9
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
This commit is contained in:
Patrick Daly
2023-06-28 18:06:55 -07:00
parent 10e42d9078
commit ca8abb5d41
1 changed files with 71 additions and 0 deletions
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71
qcom/msm-arm-smmu-sun.dtsi
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@@ -6,6 +6,66 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
kgsl_smmu: kgsl-smmu@3da0000 {
compatible = "qcom,qsmmu-v500", "qcom,adreno-smmu";
reg = <0x3da0000 0x40000>;
#iommu-cells = <2>;
qcom,use-3-lvl-tables;
#global-interrupts = <1>;
#size-cells = <1>;
#address-cells = <1>;
ranges;
dma-coherent;
qcom,regulator-names = "vdd";
vdd-supply = <&gpu_cc_cx_gdsc>;
clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
clock-names =
"gpu_cc_hlos1_vote_gpu_smmu";
interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 660 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 662 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 667 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 670 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 700 IRQ_TYPE_LEVEL_HIGH>;
qcom,actlr =
/* All CBs of GFX: +15 deep PF */
<0x000 0x3ff 0x32B>;
gpu_qtb: gpu_qtb@3de8000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x3de8000 0x1000>;
qcom,stream-id-range = <0x0 0x400>;
qcom,iova-width = <49>;
interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <2>;
};
};
apps_smmu: apps-smmu@15000000 {
compatible = "qcom,qsmmu-v500";
reg = <0x15000000 0x100000>;
@@ -241,5 +301,16 @@
iommus = <&apps_smmu 0x400 0x0>;
qcom,iommu-vmid = <0xa>; /* VMID_CP_PIXEL */
};
usecase5_kgsl {
compatible = "qcom,iommu-debug-usecase";
iommus = <&kgsl_smmu 0x7 0x0>;
};
usecase6_kgsl_dma {
compatible = "qcom,iommu-debug-usecase";
iommus = <&kgsl_smmu 0x7 0x0>;
dma-coherent;
};
};
};