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ARM: dts: qcom: Prepare to add PMIC devices for Sun

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Sun and pineapple share certain PMICs. Prepare the shared PMIC devices
to be used for both Sun and Pineapple.

Change-Id: I378e781751b4ee42b3c0d4940dff30ffbd2b3e5a
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
This commit is contained in:
Anjelique Melendez
2023-09-26 11:06:38 -07:00
parent 1f53824ca5
commit ea8a9577b5
5 changed files with 128 additions and 83 deletions
Download Patch File Download Diff File Expand all files Collapse all files

108
qcom/pineapple-pmic-overlay.dtsi
View File

@@ -13,6 +13,46 @@
#include "pmk8550.dtsi"
#include "pmr735d.dtsi"
&pm8550vs_c {
status = "ok";
};
&pm8550vs_d {
status = "ok";
};
&pm8550vs_e {
status = "ok";
};
&pm8550vs_g {
status = "ok";
};
&pm8550ve_i {
status = "ok";
};
&pm8550vs_c_temp_alarm {
status = "ok";
};
&pm8550vs_d_temp_alarm {
status = "ok";
};
&pm8550vs_e_temp_alarm {
status = "ok";
};
&pm8550vs_g_temp_alarm {
status = "ok";
};
&pm8550ve_i_temp_alarm {
status = "ok";
};
&pm8550_gpios {
key_vol_up {
key_vol_up_default: key_vol_up_default {
@@ -71,7 +111,7 @@
io-channel-names = "thermal";
};
&pm8550ve_tz {
&pm8550ve_i_tz {
io-channels = <&pmk8550_vadc PM8550VE_ADC5_GEN3_DIE_TEMP>;
io-channel-names = "thermal";
};
@@ -162,6 +202,72 @@
reg = <PM8550B_ADC5_GEN3_ICHG_FB>;
label = "pm8550b_ichg_fb";
};
pm8550b_offset_ref {
reg = <PM8550B_ADC5_GEN3_OFFSET_REF>;
label = "pm8550b_offset_ref";
qcom,pre-scaling = <1 1>;
};
pm8550b_vref_1p25 {
reg = <PM8550B_ADC5_GEN3_1P25VREF>;
label = "pm8550b_vref_1p25";
qcom,pre-scaling = <1 1>;
};
pm8550b_die_temp {
reg = <PM8550B_ADC5_GEN3_DIE_TEMP>;
label = "pm8550b_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550b_lite_die_temp {
reg = <PM8550B_ADC5_GEN3_TEMP_ALARM_LITE>;
label = "pm8550b_lite_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550b_vph_pwr {
reg = <PM8550B_ADC5_GEN3_VPH_PWR>;
label = "pm8550b_vph_pwr";
qcom,pre-scaling = <1 3>;
};
pm8550b_vbat_sns_qbg {
reg = <PM8550B_ADC5_GEN3_VBAT_SNS_QBG>;
label = "pm8550b_vbat_sns_qbg";
qcom,pre-scaling = <1 3>;
};
pm8550vs_c_die_temp {
reg = <PM8550VS_C_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_c_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550vs_d_die_temp {
reg = <PM8550VS_D_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_d_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550vs_e_die_temp {
reg = <PM8550VS_E_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_e_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550vs_g_die_temp {
reg = <PM8550VS_G_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_g_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550ve_die_temp {
reg = <PM8550VE_ADC5_GEN3_DIE_TEMP>;
label = "pm8550ve_die_temp";
qcom,pre-scaling = <1 1>;
};
};
&pmk8550_gpios {

6
qcom/pineapple-thermal-overlay.dtsi
View File

@@ -226,10 +226,10 @@
};
};
pm8550ve_tz {
pm8550ve_i_tz {
cooling-maps {
pm8550ve_nsp {
trip = <&pm8550ve_trip0>;
pm8550ve_i_nsp {
trip = <&pm8550ve_i_trip0>;
cooling-device = <&cdsp_sw_hvx 5 THERMAL_NO_LIMIT>;
};
};

18
qcom/pm8550ve.dtsi
View File

@@ -12,20 +12,21 @@
interrupt-controller;
#interrupt-cells = <4>;
qcom,pm8550ve@8 {
pm8550ve_i: qcom,pm8550ve@8 {
compatible = "qcom,spmi-pmic";
reg = <0x8 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pm8550ve_tz: pm8550ve-temp-alarm@a00 {
pm8550ve_i_tz: pm8550ve-i-temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x8 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm8550ve_gpios: pinctrl@8800 {
pm8550ve_i_gpios: pinctrl@8800 {
compatible = "qcom,pm8550ve-gpio";
reg = <0x8800>;
gpio-controller;
@@ -37,26 +38,27 @@
};
&thermal_zones {
pm8550ve_temp_alarm: pm8550ve_tz {
pm8550ve_i_temp_alarm: pm8550ve_i_tz {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm8550ve_tz>;
thermal-sensors = <&pm8550ve_i_tz>;
status = "disabled";
trips {
pm8550ve_trip0: trip0 {
pm8550ve_i_trip0: trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
pm8550ve_trip1: trip1 {
pm8550ve_i_trip1: trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "passive";
};
pm8550ve_trip2: trip2 {
pm8550ve_i_trip2: trip2 {
temperature = <145000>;
hysteresis = <0>;
type = "critical";

8
qcom/pm8550vs.dtsi
View File

@@ -17,6 +17,7 @@
reg = <0x2 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pm8550vs_c_tz: pm8550vs-c-temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
@@ -40,6 +41,7 @@
reg = <0x3 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pm8550vs_d_tz: pm8550vs-d-temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
@@ -63,6 +65,7 @@
reg = <0x4 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pm8550vs_e_tz: pm8550vs-e-temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
@@ -86,6 +89,7 @@
reg = <0x6 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pm8550vs_g_tz: pm8550vs-g-temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
@@ -111,6 +115,7 @@
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm8550vs_c_tz>;
status = "disabled";
trips {
pm8550vs_c_trip0: trip0 {
@@ -138,6 +143,7 @@
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm8550vs_d_tz>;
status = "disabled";
trips {
pm8550vs_d_trip0: trip0 {
@@ -165,6 +171,7 @@
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm8550vs_e_tz>;
status = "disabled";
trips {
pm8550vs_e_trip0: trip0 {
@@ -192,6 +199,7 @@
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm8550vs_g_tz>;
status = "disabled";
trips {
pm8550vs_g_trip0: trip0 {

71
qcom/pmk8550.dtsi
View File

@@ -161,77 +161,6 @@
qcom,pre-scaling = <1 3>;
};
/* PM8550B Channel nodes */
pm8550b_offset_ref {
reg = <PM8550B_ADC5_GEN3_OFFSET_REF>;
label = "pm8550b_offset_ref";
qcom,pre-scaling = <1 1>;
};
pm8550b_vref_1p25 {
reg = <PM8550B_ADC5_GEN3_1P25VREF>;
label = "pm8550b_vref_1p25";
qcom,pre-scaling = <1 1>;
};
pm8550b_die_temp {
reg = <PM8550B_ADC5_GEN3_DIE_TEMP>;
label = "pm8550b_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550b_lite_die_temp {
reg = <PM8550B_ADC5_GEN3_TEMP_ALARM_LITE>;
label = "pm8550b_lite_die_temp";
qcom,pre-scaling = <1 1>;
};
pm8550b_vph_pwr {
reg = <PM8550B_ADC5_GEN3_VPH_PWR>;
label = "pm8550b_vph_pwr";
qcom,pre-scaling = <1 3>;
};
pm8550b_vbat_sns_qbg {
reg = <PM8550B_ADC5_GEN3_VBAT_SNS_QBG>;
label = "pm8550b_vbat_sns_qbg";
qcom,pre-scaling = <1 3>;
};
/* PM8550VS_C Channel nodes */
pm8550vs_c_die_temp {
reg = <PM8550VS_C_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_c_die_temp";
qcom,pre-scaling = <1 1>;
};
/* PM8550VS_D Channel nodes */
pm8550vs_d_die_temp {
reg = <PM8550VS_D_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_d_die_temp";
qcom,pre-scaling = <1 1>;
};
/* PM8550VS_E Channel nodes */
pm8550vs_e_die_temp {
reg = <PM8550VS_E_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_e_die_temp";
qcom,pre-scaling = <1 1>;
};
/* PM8550VS_G Channel nodes */
pm8550vs_g_die_temp {
reg = <PM8550VS_G_ADC5_GEN3_DIE_TEMP>;
label = "pm8550vs_g_die_temp";
qcom,pre-scaling = <1 1>;
};
/* PM8550VE Channel nodes */
pm8550ve_die_temp {
reg = <PM8550VE_ADC5_GEN3_DIE_TEMP>;
label = "pm8550ve_die_temp";
qcom,pre-scaling = <1 1>;
};
};
};
};