Add pmic-glink support and its clients: -
1.ucsi.
2.qti-battery-charger.
3.altmode.
For debug support enable other clients like: -
1.glink-adc.
2.charger-ulog.
3.glink-spmi-regmap.
4.battery-debug.
Change-Id: Ida1252a029918ce53bd97ba9fcbdea89e253a774
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Add the "gcc_cfg_noc_pcie_anoc_ahb_clk" clock for tuna.
Change-Id: Ib023883dc4aac18e024aa8f0250de7aa5ad2b91a
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
Add support for LowSVS on ICC for soccp.
Change-Id: Ic845482060c91edf4e9bab3f2248dd6299f43194
Signed-off-by: Auditya Bhattaram <quic_audityab@quicinc.com>
Add Camera, Display, PCIe CESTA nodes for tuna. Also disable
them in RUMI till validations are completed.
Also rename the syscon device to avoid naming conflicts.
Change-Id: Ia8238c95b18a9992efe34e34d062e3835b501dcf
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
In this change EUSB_1P2 is added for eusb_phy and Refgen support
is added for SS Phy.
Change-Id: I1d6726882725c958178f0ad43bbd0ae264cb6046
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
The GSI event buffers are required for the various GSI related
usecases which are excercised from the dwc3 glue driver.
Add the number of event buffers along with the register offsets
defined.
Change-Id: I07bd9bb0c319392657070b6c338ddc0edf442934
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Add support for CPUSYS_VM loading for parrot and
ravelin targets.
Change-Id: I501768800e705cf0a7fdec60264b88555dc5a4b9
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add ParrotPRO SKU soc id support for parrot-vm.
Change-Id: I18de30fd773f92f1190da036fd3008ccb9263148
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add interconnect devices for clk_virt_noc, mc_virt_noc,
aggre1_noc, aggre2_noc, cnoc_cfg_noc, cnoc_main_noc, gem_noc,
lpass_ag_noc, lpass_lpiaon_noc, lpass_lpicx_noc, mmss_noc,
nsp_noc, pcie_anoc and system_noc. This will allow consumers
to get their path and set bandwidth constraints on them.
Change-Id: I99812ef866f12c4a3d4b4ee9cf0dd809c946a64f
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Move core_reset for SDC2 from platform-specific files to the tuna SoC.
This change ensures that the reset properties are managed centrally in
the SoC file, reducing redundancy and improving maintainability.
Change-Id: If8e6bcdac9b05275d20f1d205dfc7e6461d39b72
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes. Update gxclkctl
node to add support for gx_clkctl_gx_gdsc power domain.
While at it, keep the gdsc regulator nodes as it is on rumi platform.
Change-Id: If205c2116841ff3a11ebce4e06ca3067c4a8721b
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Mark videocc clock node as GenPD provider and disable the
video GDSC regulator nodes for tuna platform.
While at it, keep the gdsc regulator nodes as it is on rumi platform.
Change-Id: I8e8fc066ea54f16ccbc73b9b8705881b27d4d112
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for VIDEO clock controller and move corresponding gdsc's from
dummy to real on Kera platform.
Change-Id: I830ceb12fb979613401859313518d9e4de67e674
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for GCC and TCSRCC on Kera platform. While at it,
move the corresponding GDSC's to real.
Change-Id: I1ecf7e1ec14afc71a9fc228c636668d9052ba14b
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add dsi_pll_codes and disp_rdump_region nodes in the
beginning of devicetree to optimize the bootloader
search for these nodes during bootup which reduces
bootup time.
Change-Id: I18a85629b8a20980c07a09a74f1b0da0f41fb1f3
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
Add compatible string to led DT node for Ravelin. This
was removed from the bulk DT porting for Ravelin on qcom-6.6
device-tree branch.
Also, the pwm driver probe fails when the "qcom,num-lpg-channels"
value is higher than the number of configured channels in the
dtsi for the pwm node. This is because the driver uses the
lpg_sdam_base for every channel during probe and fails if not
configured correctly in the dtsi. So, change the num-lpg-channels
to 3 since only 3 channels are configured and used.
Change-Id: I9dbe8a2bf97316fad69ff6a5f9db42a19b839901
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
Added idle states for CPUs and CPU clusters, and PSCI device
to enable CPUs to enter deeper LPMs.
Disabled the idle states till Rumi validations are done.
Additionally. updated APPS RSC device to be in cluster power domain
to handle RSC activities when cluster is powering off.
Change-Id: Ic41e219c5c4dabe29f9ac787010ea09c5c123534
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
