On qcom-6.6, the memory reserved for memory_dump_v2 should be
configured as reserved memory instead of CMA.
Change-Id: I181b9fc4431838879d3bb99ceafd4512bcf5914e
Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com>
Add the device-tree node for the mem-offline driver to enable
memory offlining and convey the sizes of the offlineable memory.
Describe the communication channel used to communicate with the
firmware which supports onlining and offlining of memory.
Change-Id: I448969b10b0e29f44ca2b7949472ea21c63ffb3a
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add cooling-cells for the CPU sensors in monaco.
Change-Id: I6ef6acac51952effd6de820b6384401feeb610b4
Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com>
Add a PMIC PON log parser device which reads the log stored in
PMK8550 SDAM5 and SDAM6.
while at it add a dependency between the gh-watchdog and
pmic-pon-log devices for tuna boards. This ensures that
during system boot-up, the driver responsible for the
gh-watchdog device initializes before the one
responsible for the pmic-pon-log device.
Change-Id: I5e2c13807570e5a2e1740e9160cce626fa9004c6
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Disable slub debug option through command line for sun.
Change-Id: Ide22d13c6a39e9a6ade53435c3e1072efd493206
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add clock and regulator which would be required for
register accesses of kgsl-smmu for kera.
Change-Id: I27045fc113f9bc2aa56455caae568f66253adf62
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the properties of the memory region virtio-mem supports.
Also reserve the IPA space for dmabuf buffers.
Change-Id: I6baa1a7d00b26f1a885e9c85c57b7c30745dd5f6
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the properties of the memory region virtio-mem supports.
Also reserve the IPA space for dmabuf buffers.
Change-Id: Iad6b41033884828a734aa8562dc3e4d45997968b
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the properties and msgqs of the mem-buf device.
Change-Id: Ie05f273fd3747d4bf7a071ad5addae285ab612b4
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the properties and msgqs of the mem-buf device.
Change-Id: I66e4847e8c141c917f3bda22663fc60e2634917a
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the available dma-buf memory pools on tuna-vm.
Change-Id: Ia2bb3fff1f76a04c4f8a14b51917b59d029f8d5e
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the register, interrupts, and settings of the arm-smmu device.
Change-Id: I8876e31db9cd232963987599c40d0d1b37e35f08
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add BOB regulator for tuna platforms so that clients can access
the regulator and vote on it.
Change-Id: Idd57e09c29eb1ef0b9a73f2ef9e64beae5040676
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Add device-tree nodes required to support trustedvm and oemvm on Kera.
Change-Id: I7b978c5c166a4e00dcbc68c1ef6884f9ddeba72c
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add chipinfo region as ext-region for cpusysvm for Kera.
Change-Id: Id353eece5d4b825c75775f1c5be7201260007c1c
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add ddr-regions device tree node in Tuna and Kera to optimize
boot-up time as firmware will look for this node during boot
and if it finds it early, it will save some time in bootup.
Change-Id: If3d6f3be7331870b5ecec9834de1dbebfbb6c22f
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
Previous commit c0ad941ff4 ("ARM: dts: msm: Add bootargs for tuna
and kera") reverted couple of other change due to merge conflict
and merge itself. Add the affected change again to fix the issue.
Change-Id: I469075244ad34f13ea7004baae9d9423ebc4584d
Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Add support for cpufreq_hw and cpufreq_hw_debug nodes on tuna platform.
While at it, set the default governor to performance on tuna platform.
Change-Id: I2a0b89d51a16c479da35ca60286b2df18c3fba55
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Add initial set of DCVS device nodes for Tuna. This
includes the QCOM DCVS devices, PMU device memlat device
nodes and mapping tables, and bwmon device nodes.
Change-Id: I3abb2b912f22198f375635f0214bdbd0e71d5d5a
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Mark dispcc clock node as GenPD provider and disable the
display GDSC regulator nodes for tuna platform.
While at it, keep the gdsc regulator nodes as it is on rumi platform.
Change-Id: Ia1ee65d9958ba8ab6cb00616a09cd5b2304bc31a
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Remove #address-cells and #size-cells properties from the cpucp
node as they are identical to those in the parent node,
allowing them to be inherited.
Change-Id: Ief29334722acf4e525d4d510a54840c26d3e594a
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Add dsi_pll_codes and disp_rdump_region nodes in the
beginning of devicetree to optimize the bootloader
search for these nodes during bootup which reduces
bootup time.
Change-Id: I7b7fe798a9d0daf306d76bc34132574ba6e0e88e
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
Add qcom,hbst-ovp-trim property as an option for SW to trigger hBoost
OVP trim sequence. The sequence adjusts certain trim registers and
reduces hBoost voltage stepper rate. The adjustment can help in preventing
hBoost overshoots that might trigger OVP and potentially lead to the
shutdown of haptics driver.
Change-Id: I8e1e84053015e6aec46d1ba874243e66acb2d23a
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
Add pmd802x support for tuna mtp platforms.
While at it add pm7550ba thermal zones and other pm7550ba support.
Change-Id: Ia34757eecea578b454c83c24610d8bdb31e2836b
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Fix the SDC2 GPIO pin function names to match the tuna-pinctrl driver.
The function name like "SDC2_CMD" was incorrectly written as "sdc2_cmd"
and etc. This alignment ensures proper functioning.
Change-Id: I4fd35d3c7d4fbdf0ee1bc32ad81efc3088529265
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>