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ARM: dts: msm: Added CPUIdle and PSCI devices for kera

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Added idle states for CPUs and CPU clusters, and PSCI device
to enable CPUs to enter deeper LPMs.
Disabled the idle states till Rumi validations are done.

Additionally. updated APPS RSC device to be in cluster power domain
to handle RSC activities when cluster is powering off.

Change-Id: Ic41e219c5c4dabe29f9ac787010ea09c5c123534
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
This commit is contained in:
Sneh Mankad
2024-10-19 09:27:13 +05:30
parent 6047c61f82
commit 98a422d702
2 changed files with 215 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
qcom/kera-rumi.dtsi
View File

@@ -42,3 +42,39 @@
maximum-speed = "high-speed";
};
};
&SILVER_OFF {
status = "disabled";
};
&SILVER_RAIL_OFF {
status = "disabled";
};
&GOLD_OFF {
status = "disabled";
};
&GOLD_RAIL_OFF {
status = "disabled";
};
&GOLD_PLUS_OFF {
status = "disabled";
};
&GOLD_PLUS_RAIL_OFF {
status = "disabled";
};
&CLUSTER_PWR_DN {
status = "disabled";
};
&CX_RET {
status = "disabled";
};
&APSS_OFF {
status = "disabled";
};

195
qcom/kera.dtsi
View File

@@ -55,8 +55,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x0>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
next-level-cache = <&L2_0>;
L2_0: l2-cache {
compatible = "cache";
@@ -74,8 +76,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x100>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
next-level-cache = <&L2_0>;
};
@@ -83,8 +87,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x200>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
next-level-cache = <&L2_2>;
L2_2: l2-cache {
compatible = "cache";
@@ -97,8 +103,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x300>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
next-level-cache = <&L2_3>;
L2_3: l2-cache {
compatible = "cache";
@@ -111,8 +119,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x400>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
next-level-cache = <&L2_4>;
L2_4: l2-cache {
compatible = "cache";
@@ -125,8 +135,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x500>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
next-level-cache = <&L2_5>;
L2_5: l2-cache {
compatible = "cache";
@@ -139,8 +151,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x600>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
next-level-cache = <&L2_6>;
L2_6: l2-cache {
compatible = "cache";
@@ -153,8 +167,10 @@
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x700>;
enable-method = "spin-table"; /* TODO: Update to psci */
cpu-release-addr = <0x0 0xE3940000>;
enable-method = "psci";
cpu-idle-states = <&GOLD_PLUS_OFF &GOLD_PLUS_RAIL_OFF>;
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
next-level-cache = <&L2_7>;
L2_7: l2-cache {
compatible = "cache";
@@ -204,6 +220,97 @@
};
};
idle-states {
entry-method = "psci";
SILVER_OFF: silver-c3 { /* C3 */
compatible = "arm,idle-state";
idle-state-name = "pc";
entry-latency-us = <250>;
exit-latency-us = <900>;
min-residency-us = <3200>;
arm,psci-suspend-param = <0x40000003>;
local-timer-stop;
};
SILVER_RAIL_OFF: silver-cluster0-c4 { /* C4 */
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <550>;
exit-latency-us = <750>;
min-residency-us = <6700>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
GOLD_OFF: gold-c3 { /* C3 */
compatible = "arm,idle-state";
idle-state-name = "pc";
entry-latency-us = <400>;
exit-latency-us = <1100>;
min-residency-us = <4011>;
arm,psci-suspend-param = <0x40000003>;
local-timer-stop;
};
GOLD_RAIL_OFF: gold-cluster1-c4 { /* C4 */
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <550>;
exit-latency-us = <1050>;
min-residency-us = <7951>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
GOLD_PLUS_OFF: gold-plus-c3 { /* C3 */
compatible = "arm,idle-state";
idle-state-name = "pc";
entry-latency-us = <450>;
exit-latency-us = <1200>;
min-residency-us = <6230>;
arm,psci-suspend-param = <0x40000003>;
local-timer-stop;
};
GOLD_PLUS_RAIL_OFF: gold-plus-cluster3-c4 { /* C4 */
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <500>;
exit-latency-us = <1350>;
min-residency-us = <7480>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
CLUSTER_PWR_DN: cluster-d4 { /* D4 */
compatible = "domain-idle-state";
idle-state-name = "l3-off";
entry-latency-us = <750>;
exit-latency-us = <2350>;
min-residency-us = <9144>;
arm,psci-suspend-param = <0x41000044>;
};
CX_RET: cx-ret { /* Cx Ret */
compatible = "domain-idle-state";
idle-state-name = "cx-ret";
entry-latency-us = <1561>;
exit-latency-us = <2801>;
min-residency-us = <8550>;
arm,psci-suspend-param = <0x41001344>;
};
APSS_OFF: cluster-e3 { /* E3 */
compatible = "domain-idle-state";
idle-state-name = "llcc-off";
entry-latency-us = <2800>;
exit-latency-us = <4400>;
min-residency-us = <10150>;
arm,psci-suspend-param = <0x4100b344>;
};
};
soc: soc { };
hypervisor: hypervisor {
@@ -267,6 +374,56 @@
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
psci {
compatible = "arm,psci-1.0";
method = "smc";
CPU_PD0: cpu-pd0 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CPU_PD1: cpu-pd1 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CPU_PD2: cpu-pd2 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CPU_PD3: cpu-pd3 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CPU_PD4: cpu-pd4 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CPU_PD5: cpu-pd5 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CPU_PD6: cpu-pd6 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CPU_PD7: cpu-pd7 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_PD>;
};
CLUSTER_PD: cluster-pd {
#power-domain-cells = <0>;
domain-idle-states = <&CLUSTER_PWR_DN &CX_RET &APSS_OFF>;
};
};
intc: interrupt-controller@17100000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
@@ -362,6 +519,7 @@
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&CLUSTER_PD>;
apps_rsc_drv2: drv@2 {
qcom,drv-id = <2>;
@@ -549,6 +707,11 @@
qcom,smem-state-names = "stop";
};
cluster-device {
compatible = "qcom,lpm-cluster-dev";
power-domains = <&CLUSTER_PD>;
};
tlmm: pinctrl@f000000 {
compatible = "qcom,kera-tlmm";
reg = <0xf000000 0x1000000>;