replace stuff from samsung source

qcom: Build dtbos inline
Add 'qcom/wlan/' from WLAN.LA.1.0.r1-08000-pakala.0 of https://git.codelinaro.org/clo/la/platform/vendor/qcom-opensource/wlan/wlan-devicetree
2025-08-13 08:42:30 +02:00 · 2025-06-12 17:51:43 +08:00 · 2025-06-12 16:45:14 +08:00 · 2025-06-12 16:44:11 +08:00 · 2025-06-12 16:42:23 +08:00 · 2025-06-12 16:41:04 +08:00
345 changed files with 226885 additions and 1125 deletions
--- a/bindings/arm/msm/msm.yaml
+++ b/bindings/arm/msm/msm.yaml
@@ -156,33 +156,8 @@ properties:
          - enum:
              - qcom,kera-rumi
              - qcom,rumi
-              - qcom,kera-atp
-              - qcom,atp
-              - qcom,kera-cdp
-              - qcom,cdp
-              - qcom,kera-mtp
-              - qcom,mtp
-              - qcom,kera-qrd
-              - qcom,qrd
-              - qcom,kera-rcm
-              - qcom,rcm
          - const: qcom,kera

-      - description: Qualcomm Technologies, Inc. KERAP
-        items:
-          - enum:
-              - qcom,kerap-atp
-              - qcom,atp
-              - qcom,kerap-cdp
-              - qcom,cdp
-              - qcom,kerap-mtp
-              - qcom,mtp
-              - qcom,kerap-qrd
-              - qcom,qrd
-              - qcom,kerap-rcm
-              - qcom,rcm
-          - const: qcom,kerap
-
      - description: Qualcomm Technologies, Inc. MONACO
        items:
          - enum:
@@ -205,19 +180,4 @@ properties:
              - qcom,wdp
          - const: qcom,monacop

-      - description: Qualcomm Technologies, Inc. QCS610
-        items:
-          - enum:
-              - qcom,qcs610-iot
-              - qcom,iot
-              - qcom,qcs610-ipc
-              - qcom,ipc
-              - qcom,qcs610-opk
-              - qcom,opk
-          - const: qcom,qcs610
-
-      - description: Qualcomm Technologies, Inc. SM6150
-        items:
-          - const: qcom,sm6150
-
 additionalProperties: true
--- a/bindings/arm/msm/qcom,gh-secure-vm-loader.yaml
+++ b/bindings/arm/msm/qcom,gh-secure-vm-loader.yaml
@@ -26,10 +26,6 @@ properties:
    $ref: '/schemas/types.yaml#/definitions/uint32'
    description: Peripheral authentication ID of the subsystem.

-  qcom,guest-cpus:
-    $ref: '/schemas/types.yaml#/definitions/string'
-    description: Guest CPUs.
-
  qcom,firmware-name:
    $ref: '/schemas/types.yaml#/definitions/string'
    description: Virtual machine name.
@@ -46,7 +42,6 @@ required:
  - compatible
  - qcom,pas-id
  - qcom,vmid
-  - qcom,guest-cpus
  - qcom,firmware-name
  - memory-region
  - virtio-backends
@@ -59,7 +54,6 @@ examples:
      compatible = "qcom,gh-secure-vm-loader";
      qcom,pas-id = <28>;
      qcom,vmid = <45>;
-      qcom,guest-cpus = "5-6";
      qcom,firmware-name = "trustedvm";
      memory-region = <&trust_ui_vm_mem>;
      virtio-backends = <&trust_ui_vm_virt_be0>;
--- a/bindings/arm/msm/qcom,llcc.yaml
+++ b/bindings/arm/msm/qcom,llcc.yaml
@@ -27,7 +27,6 @@ properties:
      - qcom,sc8180x-llcc
      - qcom,sc8280xp-llcc
      - qcom,sdm845-llcc
-      - qcom,sm6150-llcc
      - qcom,sm6350-llcc
      - qcom,sm8150-llcc
      - qcom,sm8250-llcc
@@ -38,7 +37,6 @@ properties:
      - qcom,sun-llcc
      - qcom,sdxpinn-llcc
      - qcom,tuna-llcc
-      - qcom,tuna7-llcc
      - qcom,kera-llcc
      - qcom,x1e80100-llcc

--- a/bindings/arm/msm/sys-pm-violators.yaml
+++ b/bindings/arm/msm/sys-pm-violators.yaml
@@ -26,9 +26,6 @@ properties:
      - qcom,sys-pm-pineapple
      - qcom,sys-pm-monaco-auto
      - qcom,sys-pm-sun
-      - qcom,sys-pm-tuna
-      - qcom,sys-pm-kera
-      - qcom,sys-pm-sdxkova

  reg:
    maxItems: 1
@@ -51,13 +48,9 @@ allOf:
          contains:
            enum:
              - qcom,sys-pm-sun
-              - qcom,sys-pm-tuna
-              - qcom,sys-pm-kera
              - qcom,sys-pm-pineapple
              - qcom,sys-pm-parrot
              - qcom,sys-pm-ravelin
-              - qcom,sys-pm-sdxkova
-
    then:
      properties:
        reg:
--- a/bindings/clock/qcom,camcc-sun.yaml
+++ b/bindings/clock/qcom,camcc-sun.yaml
@@ -21,7 +21,6 @@ properties:
    enum:
      - qcom,sun-camcc
      - qcom,tuna-camcc
-      - qcom,kera-camcc

  clocks:
    items:
--- a/bindings/clock/qcom,debugcc.yaml
+++ b/bindings/clock/qcom,debugcc.yaml
@@ -20,12 +20,8 @@ properties:
      - qcom,sun-debugcc
      - qcom,parrot-debugcc
      - qcom,sdx75-debugcc
-      - qcom,sdxbaagha-debugcc
      - qcom,sm4450-debugcc
-      - qcom,sm6150-debugcc
      - qcom,monaco-debugcc
-      - qcom,tuna-debugcc
-      - qcom,kera-debugcc

  clocks:
    items:
--- a/bindings/clock/qcom,dispcc-sm8x50.yaml
+++ b/bindings/clock/qcom,dispcc-sm8x50.yaml
@@ -31,9 +31,6 @@ properties:
      - qcom,pineapple-dispcc
      - qcom,sun-dispcc
      - qcom,tuna-dispcc
-      - qcom,tuna-dispcc-v1
-      - qcom,kera-dispcc
-      - qcom,sun-dispcc_mx

  clocks:
    items:
--- a/bindings/clock/qcom,gcc-sun.yaml
+++ b/bindings/clock/qcom,gcc-sun.yaml
@@ -23,7 +23,6 @@ properties:
      - qcom,gcc-sun
      - qcom,tuna-gcc
      - qcom,kera-gcc
-      - qcom,tuna-gcc-v1

  clocks:
    items:
--- a/bindings/clock/qcom,gpucc.yaml
+++ b/bindings/clock/qcom,gpucc.yaml
@@ -27,7 +27,6 @@ description: |
    dt-bindings/clock/qcom,gpucc-parrot.h
    dt-bindings/clock/qcom,gpucc-monaco.h
    dt-bindings/clock/qcom,gpucc-tuna.h
-    dt-bindings/clock/qcom,gpucc-kera.h

 properties:
  compatible:
@@ -46,7 +45,6 @@ properties:
      - qcom,parrot-gpucc
      - qcom,monaco-gpucc
      - qcom,tuna-gpucc
-      - qcom,kera-gpucc

  clocks:
    items:
--- a/bindings/clock/qcom,gx_clkctl.yaml
+++ b/bindings/clock/qcom,gx_clkctl.yaml
@@ -15,13 +15,12 @@ description: |

  See also:
    dt-bindings/clock/qcom,gxclkctl-sun.h
-    dt-bindings/clock/qcom,gpucc-tuna.h

 properties:
  compatible:
    enum:
      - qcom,sun-gx_clkctl
-      - qcom,tuna-gx_clkctl
+
  reg:
    maxItems: 1

--- a/bindings/clock/qcom,rpmhcc.yaml
+++ b/bindings/clock/qcom,rpmhcc.yaml
@@ -26,9 +26,7 @@ properties:
      - qcom,sdx55-rpmh-clk
      - qcom,sdx65-rpmh-clk
      - qcom,sdx75-rpmh-clk
-      - qcom,sdxbaagha-rpmh-clk
      - qcom,sm4450-rpmh-clk
-      - qcom,sm6150-rpmh-clk
      - qcom,sm6350-rpmh-clk
      - qcom,sm8150-rpmh-clk
      - qcom,sm8250-rpmh-clk
@@ -37,7 +35,6 @@ properties:
      - qcom,pineapple-rpmh-clk
      - qcom,sun-rpmh-clk
      - qcom,parrot-rpmh-clk
-      - qcom,tuna-rpmh-clk

  clocks:
    maxItems: 1
--- a/bindings/input/qcom,hv-haptics.yaml
+++ b/bindings/input/qcom,hv-haptics.yaml
@@ -161,13 +161,6 @@ properties:
      method is used for LRA resonant frequency detection.
    type: boolean

-  qcom,hbst-ovp-trim:
-    description: |
-      Boolean flag indicating that the hBoost OVP trim PBS sequence would be
-      triggered during driver initialization. This is only applicable for HAP530_HV
-      haptics module.
-    type: boolean
-
 patternProperties:
  ".*hap-swr-slave-reg$":
    description: |
--- a/bindings/interconnect/qcom,rpmh.yaml
+++ b/bindings/interconnect/qcom,rpmh.yaml
@@ -89,23 +89,6 @@ properties:
      - qcom,sdx65-mc-virt
      - qcom,sdx65-mem-noc
      - qcom,sdx65-system-noc
-      - qcom,sdxbaagha-aggre_noc,
-      - qcom,sdxbaagha-cnoc_main,
-      - qcom,sdxbaagha-dc_noc,
-      - qcom,sdxbaagha-mc_virt,
-      - qcom,sdxbaagha-clk_virt,
-      - qcom,sdxbaagha-pcie_anoc,
-      - qcom,sdxbaagha-mem_noc,
-      - qcom,sdxbaagha-system_noc,
-      - qcom,sm6150-aggre1_noc
-      - qcom,sm6150-camnoc_virt
-      - qcom,sm6150-config_noc
-      - qcom,sm6150-dc_noc
-      - qcom,sm6150-gem_noc
-      - qcom,sm6150-ipa_virt
-      - qcom,sm6150-mc_virt
-      - qcom,sm6150-mmss_noc
-      - qcom,sm6150-system_noc
      - qcom,sm8150-aggre1-noc
      - qcom,sm8150-aggre2-noc
      - qcom,sm8150-camnoc-noc
@@ -215,20 +198,6 @@ properties:
      - qcom,tuna-nsp_noc
      - qcom,tuna-pcie_anoc
      - qcom,tuna-system_noc
-      - qcom,kera-aggre1_noc
-      - qcom,kera-aggre2_noc
-      - qcom,kera-clk_virt
-      - qcom,kera-cnoc_cfg
-      - qcom,kera-cnoc_main
-      - qcom,kera-gem_noc
-      - qcom,kera-lpass_ag_noc
-      - qcom,kera-lpass_lpiaon_noc
-      - qcom,kera-lpass_lpicx_noc
-      - qcom,kera-mc_virt
-      - qcom,kera-mmss_noc
-      - qcom,kera-nsp_noc
-      - qcom,kera-pcie_anoc
-      - qcom,kera-system_noc

  '#interconnect-cells': true

--- a/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/bindings/interrupt-controller/qcom,pdc.yaml
@@ -39,7 +39,6 @@ properties:
          - qcom,ravelin-pdc
          - qcom,tuna-pdc
          - qcom,kera-pdc
-          - qcom,sm6150-pdc
      - const: qcom,pdc

  reg:
--- a/bindings/nvmem/qcom,qfprom.yaml
+++ b/bindings/nvmem/qcom,qfprom.yaml
@@ -24,7 +24,6 @@ properties:
          - qcom,msm8996-qfprom
          - qcom,msm8998-qfprom
          - qcom,qcs404-qfprom
-          - qcom,parrot-qfprom
          - qcom,sc7180-qfprom
          - qcom,sc7280-qfprom
          - qcom,sdm630-qfprom
@@ -32,8 +31,6 @@ properties:
          - qcom,sm6115-qfprom
          - qcom,sun-qfprom
          - qcom,ravelin-qfprom
-          - qcom,tuna-qfprom
-          - qcom,kera-qfprom
      - const: qcom,qfprom

  reg:
--- a/bindings/pinctrl/qcom,pmic-gpio.yaml
+++ b/bindings/pinctrl/qcom,pmic-gpio.yaml
@@ -28,7 +28,6 @@ properties:
          - qcom,pm6450-gpio
          - qcom,pm7250b-gpio
          - qcom,pm7325-gpio
-          - qcom,pm7325b-gpio
          - qcom,pm7550ba-gpio
          - qcom,pm8005-gpio
          - qcom,pm8008-gpio
@@ -74,7 +73,6 @@ properties:
          - qcom,pmx55-gpio
          - qcom,pmx65-gpio
          - qcom,pmx75-gpio
-          - qcom,pmx35-gpio
          - qcom,pmxr2230-gpio

      - enum:
@@ -185,10 +183,8 @@ allOf:
              - qcom,pm8350b-gpio
              - qcom,pm8550ve-gpio
              - qcom,pm8950-gpio
-              - qcom,pm7325b-gpio
              - qcom,pm7550ba-gpio
              - qcom,pmi632-gpio
-              - qcom,pmx35-gpio
    then:
      properties:
        gpio-line-names:
@@ -445,7 +441,6 @@ $defs:
                 - gpio1-gpio9 for pm6450
                 - gpio1-gpio12 for pm7250b
                 - gpio1-gpio10 for pm7325
-                 - gpio1-gpio8 for pm7325b
                 - gpio1-gpio8 for pm7550ba
                 - gpio1-gpio4 for pm8005
                 - gpio1-gpio2 for pm8008
@@ -488,7 +483,6 @@ $defs:
                 - gpio1-gpio2 for pmr735d
                 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9
                                            and gpio10)
-                 - gpio1-gpio8 for pmx35
                 - gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10
                                            and gpio11)
                 - gpio1-gpio16 for pmx65
--- a/bindings/pwm/qcom,pwm-qti-lpg.yaml
+++ b/bindings/pwm/qcom,pwm-qti-lpg.yaml
@@ -88,13 +88,12 @@ properties:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    maxItems: 64

-  qcom,mid-res-support:
+  qcom,force-low-pwm-size:
    description: |
-      The flag to indicate support for medium resolution pwm
-      for PMICs where the subtype detects high resolution, but
-      the high resolution clock source 76.8Mz is not supported.
-      This flag will ensure removal of 76.8MHz clock support and
-      usage of the other 3 clock sources.
+      The flag to indicate the forced use of legacy low PWM sizes
+      (6 or 9 bits) instead of full 8-15 bit PWM sizes, when the
+      PWM size is calculated based on the requested PWM period by
+      the client driver.
    type: boolean

 required:
--- a/bindings/regulator/qcom,qpnp-lcdb-regulator.yaml
+++ b/bindings/regulator/qcom,qpnp-lcdb-regulator.yaml
@@ -33,11 +33,6 @@ properties:
                 to be enabled only on platforms where voltage needs to
                 be ramped up with multiple steps.

-  qcom,ncp-symmetry:
-    type: boolean
-    description: Enabling this will make NCP voltage follow LDO voltage
-                 directly.
-
  qcom,pwrdn-delay-ms:
    description: Required to control the LDO power down delay.
                 Possible values are 0, 1, 4, 8.
@@ -49,30 +44,13 @@ properties:
  qcom,pwrup-config:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Controls the order of powering up BOOST, LDO AND NCP
-                 blocks. Applicable for PM7325B. Possible values are 0, 1, 2, 3, 4.
+                 blocks. Appilcable for PM7325B. Possible values are 0, 1, 2, 3, 4.
                     0 - Boost, LDO, NCP
                     1 - Boost, LDO
                     2 - Boost, NCP
                     3 - Boost only
                     4 - Boost, NCP, LDO

-  qcom,high-p2-blank-time-ns:
-    description: Controls the higher clamp threshold for p2 minimum on time.
-                 Applicable for PM7325B. Possible values are 40, 69, 99, 129, 159,
-                 189, 220, 250.
-
-  qcom,low-p2-blank-time-ns:
-    description: Controls the lower clamp threshold for p2 minimum on time.
-                 Applicable for PM7325B. Possible values are 40, 69, 99, 129, 159,
-                 189, 220, 250.
-
-  qcom,mpc-current-thr-ma:
-    $ref: /schemas/types.yaml#/definitions/uint32
-    description: Controls the mpc threshold for inductor current after start up
-                 is done. Applicable for PM7325B. Possible values are 160, 200, 240,
-                 280, 320, 360, 400, 440.
-
-
  qcom,ttw-enable:
    type: boolean
    description: Touch to wake-up support enabled.
--- a/bindings/remoteproc/qcom,adsp.yaml
+++ b/bindings/remoteproc/qcom,adsp.yaml
@@ -63,23 +63,15 @@ properties:
      - qcom,sun-cdsp-pas
      - qcom,sun-modem-pas
      - qcom,sun-soccp-pas
-      - qcom,tuna-adsp-pas
-      - qcom,tuna-cdsp-pas
-      - qcom,tuna-modem-pas
      - qcom,parrot-adsp-pas
      - qcom,parrot-cdsp-pas
      - qcom,parrot-modem-pas
      - qcom,parrot-wpss-pas
-      - qcom,kera-adsp-pas
-      - qcom,kera-cdsp-pas
-      - qcom,kera-modem-pas
      - qcom,ravelin-adsp-pas
      - qcom,ravelin-modem-pas
      - qcom,ravelin-wpss-pas
      - qcom,monaco-modem-pas
      - qcom,monaco-adsp-pas
-      - qcom,tuna-wpss-pas
-      - qcom,kera-wpss-pas

  reg:
    maxItems: 1
--- a/bindings/soc/qcom/qcom,pcie-pdc.yaml
+++ b/bindings/soc/qcom/qcom,pcie-pdc.yaml
@@ -21,10 +21,7 @@ properties:
      - qcom,sun-pcie-pdc
      - qcom,pineapple-pcie-pdc
      - qcom,cliffs-pcie-pdc
-      - qcom,tuna-pcie-pdc
-      - qcom,kera-pcie-pdc
      - qcom,pcie-pdc
-      - qcom,sdxkova-pcie-pdc

  reg:
    maxItems: 1
--- a/bindings/soc/qcom/qcom-stats.yaml
+++ b/bindings/soc/qcom/qcom-stats.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/soc/qcom/qcom-stats.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Qualcomm Technologies, Inc. SoC LPM stats
+title: Qualcomm Technologies, Inc. (QTI) Stats bindings

 maintainers:
  - Maulik Shah <mkshah@codeaurora.org>
@@ -25,7 +25,6 @@ properties:
      - qcom,rpmh-stats-v4
      - qcom,sdm845-rpmh-stats
      - qcom,rpm-stats
-      - qcom,rpm-stats-v2
      # For older RPM firmware versions with fixed offset for the sleep stats
      - qcom,apq8084-rpm-stats
      - qcom,msm8226-rpm-stats
--- a/bindings/spmi/qcom,spmi-pmic-arb.yaml
+++ b/bindings/spmi/qcom,spmi-pmic-arb.yaml
@@ -85,13 +85,6 @@ properties:
    description: >
      which of the PMIC Arb provided channels to use for accesses

-  qcom,mid:
-    $ref: /schemas/types.yaml#/definitions/uint32
-    minimum: 0
-    maximum: 3
-    description: >
-      SPMI master ID of this controller.
-
 required:
  - compatible
  - reg-names
--- a/bindings/thermal/qcom-bcl-pmic5.yaml
+++ b/bindings/thermal/qcom-bcl-pmic5.yaml
@@ -23,11 +23,8 @@ description: |

 properties:
  compatible:
-    description: msm battery current limiting device
-    items:
-      - const: qcom,bcl-v5
-      - const: qcom,pm8550-bcl-v5
-      - const: qcom,pmiv010x-bcl-v5
+    const: qcom,bcl-v5
+    description: msm battery state of charge device

  reg:
    maxItems: 1
@@ -57,20 +54,6 @@ properties:
      - const: bcl-lvl1
      - const: bcl-lvl2

-  qcom,bcl-mon-vbat-only:
-    type: boolean
-    description: |
-      When this flag is defined, the BCL driver will only monitor
-      Vbat or both Ibat and Vbat based on runtime battery type and
-      Rsense input.
-
-  qcom,bcl-mon-ibat-only:
-    type: boolean
-    description: |
-      When this flag is defined, the BCL driver will only monitor
-      Ibat or don't monitor anything based on runtime battery type
-      and Rsense input.
-
  qcom,pmic7-threshold:
    type: boolean
    description: |
@@ -96,19 +79,5 @@ examples:
                     <0x2 0x42 0x1 IRQ_TYPE_NONE>;
        interrupt-names = "bcl-lvl0",
                          "bcl-lvl1";
-        qcom,bcl-mon-vbat-only;
        qcom,pmic7-threshold;
    };
-
-    bcl@4700 {
-        compatible = "qcom,pm8550-bcl-v5";
-        reg = <0x4700 0x100>;
-        interrupts = <0x1 0x47 0x0 IRQ_TYPE_NONE>,
-                     <0x1 0x47 0x1 IRQ_TYPE_NONE>,
-                     <0x1 0x47 0x2 IRQ_TYPE_NONE>;
-        interrupt-names = "bcl-lvl0",
-                          "bcl-lvl1",
-                          "bcl-lvl2";
-        qcom,pmic7-threshold;
-        #thermal-sensor-cells = <1>;
-    };
--- a/bindings/thermal/qcom-tsens.yaml
+++ b/bindings/thermal/qcom-tsens.yaml
@@ -53,7 +53,6 @@ properties:
              - qcom,sc8280xp-tsens
              - qcom,sdm630-tsens
              - qcom,sdm845-tsens
-              - qcom,sm6150-tsens
              - qcom,sm6350-tsens
              - qcom,sm8150-tsens
              - qcom,sm8250-tsens
--- a/bindings/ufs/qcom,ufs.yaml
+++ b/bindings/ufs/qcom,ufs.yaml
@@ -37,8 +37,6 @@ properties:
          - qcom,ufs-phy-qmp-v4-pineapple
          - qcom,ufs-phy-qmp-v4-waipio
          - qcom,ufs-phy-qmp-v4-sun
-          - qcom,ufs-phy-qmp-v4-niobe
-          - qcom,ufs-phy-qmp-v3-660
      - const: qcom,ufshc
      - const: jedec,ufs-2.0

--- a/bindings/usb/qcom,dwc-usb3-msm.yaml
+++ b/bindings/usb/qcom,dwc-usb3-msm.yaml
@@ -61,11 +61,6 @@ properties:
  USB3_GDSC-supply:
    description: USB GDSC supply.

-  vbus_dwc3-supply:
-    description: Regulator supply for the VBUS 5V power for USB host mode.
-                 This is typically used when VBUS is controlled by a GPIO-based
-                 regulator to enable/disable USB port power.
-
  clock-names:
    minItems: 1
    items:
@@ -173,7 +168,6 @@ examples:
          ranges;

          USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>;
-          vbus_dwc3-supply = <&usb0_vbus_reg>;
          clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
                   <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
                   <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
--- a/bindings/usb/qcom,usb-snps-eusb2-phy.yaml
+++ b/bindings/usb/qcom,usb-snps-eusb2-phy.yaml
@@ -71,11 +71,6 @@ properties:
      phandle to eUSB2 repeater for enforcing probe ordering for eUSB2 repeater
      and eUSB2 PHY driver.

-  vdd_refgen-supply:
-    description: |
-      phandle to vote for additional refgen ldo. This is generally board/target
-      specific.
-
 required:
  - compatible
  - reg
--- a/qcom/Makefile
+++ b/qcom/Makefile
@@ -1,363 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
-
-# add-overlay defines the target with following naming convention:
-# <base>-<board>-dtbs = base.dtb board.dtbo
-#
-# Combined dtb target is also generated using the fdt_overlay tool.
-# dtb-y += <base>-<board>.dtb
-
-add-overlays = $(foreach o,$1,$(foreach b,$2,$(eval $(basename $b)-$(basename $o)-dtbs = $b $o) $(basename $b)-$(basename $o).dtb))
-
-# sun-dtb-y is list of DTBs to install when doing non-overlay build
-# sun-overlays-dtb-y is list of DTBs and DTBOs to install when doing overlay-supported build
-# see DTB_TYPES from scripts/Makefile.dtbinst and install_dtbs from build.config.msm.common
-#
-
-ifneq ($(CONFIG_ARCH_QTI_VM), y)
-
-SUN_BASE_DTB += sun.dtb sun-v2.dtb sun-tp.dtb sun-tp-v2.dtb
-SUN_APQ_BASE_DTB += sunp.dtb sunp-v2.dtb sunp-tp.dtb sunp-tp-v2.dtb
-
-SUN_BOARDS += \
-		sun-mtp-3.5mm-kiwi-v8-overlay.dtbo \
-		sun-mtp-3.5mm-overlay.dtbo \
-		sun-mtp-kiwi-overlay.dtbo \
-		sun-mtp-kiwi-v8-overlay.dtbo \
-		sun-mtp-nfc-overlay.dtbo \
-		sun-mtp-overlay.dtbo \
-		sun-mtp-qmp1000-overlay.dtbo \
-		sun-mtp-qmp1000-v8-overlay.dtbo \
-		sun-mtp-v8-overlay.dtbo \
-		sun-cdp-kiwi-overlay.dtbo \
-		sun-cdp-kiwi-v8-overlay.dtbo \
-		sun-cdp-nfc-overlay.dtbo \
-		sun-cdp-no-display-overlay.dtbo \
-		sun-cdp-overlay.dtbo \
-		sun-cdp-v8-overlay.dtbo \
-		sun-qrd-sku1-overlay.dtbo \
-		sun-qrd-sku1-v8-overlay.dtbo \
-		sun-qrd-sku2-v8-overlay.dtbo \
-		sun-rcm-kiwi-overlay.dtbo \
-		sun-rcm-kiwi-v8-overlay.dtbo \
-		sun-rcm-overlay.dtbo \
-		sun-rcm-v8-overlay.dtbo \
-		sun-atp-overlay.dtbo \
-		sunp-hdk-overlay.dtbo
-
-NOAPQ_SUN_BOARDS += \
-		 sun-rumi-overlay.dtbo
-
-sun-dtb-$(CONFIG_ARCH_SUN) += \
-	$(call add-overlays, $(SUN_BOARDS) $(NOAPQ_SUN_BOARDS),$(SUN_BASE_DTB))\
-	$(call add-overlays, $(SUN_BOARDS) $(APQ_SUN_BOARDS),$(SUN_APQ_BASE_DTB))
-sun-overlays-dtb-$(CONFIG_ARCH_SUN) += $(SUN_BOARDS) $(NOAPQ_SUN_BOARDS) $(SUN_BASE_DTB) $(SUN_APQ_BASE_DTB)
-
-TUNA_BASE_DTB += tuna.dtb tuna7.dtb
-TUNA_APQ_BASE_DTB += tunap.dtb
-TUNA_BOARDS += \
-		tuna-atp-overlay.dtbo \
-		tuna-cdp-overlay.dtbo \
-		tuna-mtp-kiwi-harmonium-overlay.dtbo \
-		tuna-mtp-kiwi-overlay.dtbo \
-		tuna-mtp-nfc-overlay.dtbo \
-		tuna-mtp-overlay.dtbo \
-		tuna-mtp-qmp1000-overlay.dtbo \
-		tuna-mtp-kiwi-pmd802x-overlay.dtbo \
-		tuna-qrd-overlay.dtbo \
-		tuna-rcm-kiwi-overlay.dtbo \
-		tuna-rcm-overlay.dtbo
-
-NOAPQ_TUNA_BOARDS += \
-		tuna-rumi-overlay.dtbo
-
-sun-dtb-$(CONFIG_ARCH_TUNA) +=  \
-        $(call add-overlays, $(TUNA_BOARDS) $(NOAPQ_TUNA_BOARDS),$(TUNA_BASE_DTB)) \
-	$(call add-overlays, $(TUNA_BOARDS) $(APQ_TUNA_BOARDS),$(TUNA_APQ_BASE_DTB))
-sun-overlays-dtb-$(CONFIG_ARCH_TUNA) += $(TUNA_BOARDS) $(NOAPQ_TUNA_BOARDS) $(TUNA_BASE_DTB) $(TUNA_APQ_BASE_DTB)
-dtb-y += $(sun-dtb-y)
-
-KERA_BASE_DTB += kera.dtb
-KERA_APQ_BASE_DTB += kerap.dtb
-KERA_BOARDS += \
-		kera-atp-overlay.dtbo \
-		kera-mtp-qca6750-ufs4-overlay.dtbo \
-		kera-mtp-qca6750-ufs3-overlay.dtbo \
-		kera-mtp-qca6750-qmp1000-overlay.dtbo \
-		kera-mtp-wcn7750-qmp1000-overlay.dtbo \
-		kera-mtp-wcn7750-ufs4-overlay.dtbo \
-		kera-mtp-wcn7750-ufs3-overlay.dtbo \
-		kera-cdp-qca6750-ufs2-overlay.dtbo \
-		kera-cdp-qca6750-ufs3-overlay.dtbo \
-		kera-cdp-qca6750-ufs4-overlay.dtbo \
-		kera-iot-cdp-qca6750-ufs4-overlay.dtbo \
-		kera-cdp-qca6750-ufs4-slt-overlay.dtbo \
-		kera-qrd-wcn7750-ufs4-overlay.dtbo \
-		kera-qrd-wcn7750-ufs2-overlay.dtbo \
-		kera-qrd-wcn7750-ufs3-overlay.dtbo \
-		kera-qrd-qca6750-ufs2-overlay.dtbo \
-		kera-rcm-qca6750-ufs4-overlay.dtbo \
-		kera-rcm-qca6750-ufs2-overlay.dtbo \
-		kera-rcm-qca6750-ufs3-overlay.dtbo \
-		kera-rcm-wcn7750-ufs2-overlay.dtbo \
-		kera-rcm-wcn7750-ufs3-overlay.dtbo \
-		kera-rcm-wcn7750-ufs4-overlay.dtbo
-
-NOAPQ_KERA_BOARDS += \
-		kera-rumi-overlay.dtbo
-
-sun-dtb-$(CONFIG_ARCH_KERA) +=  \
-	$(call add-overlays, $(KERA_BOARDS) $(NOAPQ_KERA_BOARDS),$(KERA_BASE_DTB)) \
-	$(call add-overlays, $(KERA_BOARDS) $(APQ_KERA_BOARDS),$(KERA_APQ_BASE_DTB))
-sun-overlays-dtb-$(CONFIG_ARCH_KERA) += $(KERA_BOARDS) $(NOAPQ_KERA_BOARDS) $(KERA_BASE_DTB) $(KERA_APQ_BASE_DTB)
-
-dtb-y += $(sun-dtb-y)
-
-QCS610_BASE_DTB += qcs610.dtb
-
-QCS610_BOARDS += \
-		 qcs610-iot-overlay.dtbo \
-		 qcs610-ipc-overlay.dtbo \
-		 qcs610-opk-overlay.dtbo
-
-qcs610-dtb-$(CONFIG_ARCH_SM6150) += \
-        $(call add-overlays, $(QCS610_BOARDS),$(QCS610_BASE_DTB))
-qcs610-overlays-dtb-$(CONFIG_ARCH_SM6150) += $(QCS610_BOARDS) $(QCS610_BASE_DTB)
-dtb-y += $(qcs610-dtb-y)
-
-PINEAPPLE_BASE_DTB += pineapple.dtb pineapple-v2.dtb
-PINEAPPLE_APQ_BASE_DTB += pineapplep.dtb pineapplep-v2.dtb
-
-PINEAPPLE_BOARDS += \
-		 pineapple-mtp-overlay.dtbo \
-		 pineapple-mtp-nfc-overlay.dtbo \
-		 pineapple-cdp-overlay.dtbo \
-		 pineapple-cdp-nfc-overlay.dtbo \
-		 pineapple-qrd-overlay.dtbo \
-		 pineapple-qrd-sku2-overlay.dtbo \
-		 pineapple-rcm-overlay.dtbo \
-		 pineapple-atp-overlay.dtbo
-
-NOAPQ_PINEAPPLE_BOARDS += \
-		 pineapple-rumi-overlay.dtbo
-
-pineapple-dtb-$(CONFIG_ARCH_PINEAPPLE) += \
-	$(call add-overlays, $(PINEAPPLE_BOARDS) $(NOAPQ_PINEAPPLE_BOARDS),$(PINEAPPLE_BASE_DTB))\
-	$(call add-overlays, $(PINEAPPLE_BOARDS) $(APQ_PINEAPPLE_BOARDS),$(PINEAPPLE_APQ_BASE_DTB))
-pineapple-overlays-dtb-$(CONFIG_ARCH_PINEAPPLE) += $(PINEAPPLE_BOARDS) $(NOAPQ_PINEAPPLE_BOARDS) $(PINEAPPLE_BASE_DTB) $(PINEAPPLE_APQ_BASE_DTB)
-dtb-y += $(pineapple-dtb-y)
-
-PARROT_BASE_DTB += parrot.dtb parrotp.dtb parrot-sg.dtb parrotp-sg.dtb
-PARROT_4GB_BASE_DTB += parrot-4gb.dtb
-
-PARROT_BOARDS += \
-		 parrot-rumi-overlay.dtbo \
-		 parrot-atp-overlay.dtbo \
-		 parrot-idp-overlay.dtbo \
-		 parrot-idp-wcn3990-overlay.dtbo \
-		 parrot-idp-wcn3990-amoled-rcm-overlay.dtbo \
-		 parrot-idp-wcn6750-amoled-rcm-overlay.dtbo \
-		 parrot-idp-wcn6750-amoled-overlay.dtbo \
-		 parrot-idp-nopmi-overlay.dtbo \
-		 parrot-idp-pm8350b-overlay.dtbo \
-		 parrot-qrd-overlay.dtbo \
-		 parrot-qrd-wcn6750-overlay.dtbo \
-		 parrot-qrd-nopmi-overlay.dtbo   \
-		 parrot-qrd-pm8350b-overlay.dtbo \
-		 parrot-idp-wcn6755-overlay.dtbo \
-		 parrot-idp-wcn6755-amoled-rcm-overlay.dtbo \
-		 parrot-qrd-wcn6755-overlay.dtbo \
-		 parrot-idp-wcn6755-pm8350b-overlay.dtbo \
-		 parrot-idp-wcn6755-nopmi-overlay.dtbo
-
-PARROT_4GB_BOARDS += \
-		 parrot-idp-4gb-overlay.dtbo \
-		 parrot-idp-wcn3990-4gb-overlay.dtbo \
-		 parrot-idp-wcn3990-amoled-rcm-4gb-overlay.dtbo \
-		 parrot-idp-wcn6750-amoled-rcm-4gb-overlay.dtbo \
-		 parrot-idp-wcn6750-amoled-4gb-overlay.dtbo \
-		 parrot-qrd-4gb-overlay.dtbo \
-		 parrot-qrd-wcn6750-4gb-overlay.dtbo \
-
-
-parrot-dtb-$(CONFIG_ARCH_PARROT) += \
-	$(call add-overlays, $(PARROT_BOARDS),$(PARROT_BASE_DTB)) \
-	$(call add-overlays, $(PARROT_4GB_BOARDS),$(PARROT_4GB_BASE_DTB))
-parrot-overlays-dtb-$(CONFIG_ARCH_PARROT) += $(PARROT_BOARDS) $(PARROT_BASE_DTB) $(PARROT_4GB_BOARDS) $(PARROT_4GB_BASE_DTB)
-dtb-y += $(parrot-dtb-y)
-
-RAVELIN_BASE_DTB += ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb
-RAVELIN_4GB_BASE_DTB += ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb
-
-RAVELIN_BOARDS += \
-		 ravelin-rumi-overlay.dtbo \
-		 ravelin-atp-overlay.dtbo \
-		 ravelin-idp-overlay.dtbo \
-		 ravelin-idp-wcn3950-amoled-rcm-overlay.dtbo \
-		 ravelin-qrd-overlay.dtbo \
-
-RAVELIN_4GB_BOARDS += \
-		 ravelin-idp-wcn3988-4gb-overlay.dtbo \
-		 ravelin-qrd-4gb-overlay.dtbo \
-
-parrot-dtb-$(CONFIG_ARCH_RAVELIN) += \
-	$(call add-overlays, $(RAVELIN_BOARDS),$(RAVELIN_BASE_DTB)) \
-	$(call add-overlays, $(RAVELIN_4GB_BOARDS),$(RAVELIN_4GB_BASE_DTB))
-parrot-overlays-dtb-$(CONFIG_ARCH_RAVELIN) += $(RAVELIN_BOARDS) $(RAVELIN_BASE_DTB) $(RAVELIN_4GB_BOARDS) $(RAVELIN_4GB_BASE_DTB)
-dtb-y += $(parrot-dtb-y)
-
-endif
-
-ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
-ifeq ($(CONFIG_ARCH_QTI_VM), y)
-pineapple_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += pineapple-vm-rumi.dtb \
-				pineapple-vm-mtp.dtb \
-				pineapple-vm-cdp.dtb \
-				pineapple-vm-qrd.dtb \
-				pineapple-vm-rcm.dtb \
-				pineapple-oemvm-cdp.dtb \
-				pineapple-oemvm-mtp.dtb \
-				pineapple-oemvm-qrd.dtb \
-				pineapple-oemvm-rumi.dtb \
-				pineapple-oemvm-rcm.dtb
-dtb-y += $(pineapple_tuivm-dtb-y)
-
-endif
-endif
-
-ifeq ($(CONFIG_ARCH_SDXKOVA), y)
-sdxkova-dtb-$(CONFIG_ARCH_SDXKOVA) += sdxkova-idp-cpe.dtb \
-				sdxkova-idp-mbb.dtb \
-				sdxkova-idp-m2.dtb
-
-sdxkova-cpe-wkk-dtb-$(CONFIG_ARCH_SDXKOVA) += sdxkova-idp-cpe.dtb
-
-dtb-y += $($(MSM_ARCH)-dtb-y)
-
-endif
-
-ifeq ($(CONFIG_ARCH_SUN), y)
-ifeq ($(CONFIG_ARCH_QTI_VM), y)
-sun_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += sun-vm-rumi.dtb \
-				sun-vm-mtp.dtb \
-				sun-vm-mtp-v8.dtb \
-				sun-vm-cdp.dtb \
-				sun-vm-qrd.dtb \
-				sun-vm-rcm.dtb \
-				sunp-vm-hdk.dtb \
-				sun-oemvm-rumi.dtb \
-				sun-oemvm-mtp.dtb \
-				sun-oemvm-mtp-v8.dtb \
-				sun-oemvm-cdp.dtb \
-				sun-oemvm-qrd.dtb \
-				sun-oemvm-rcm.dtb \
-				sunp-oemvm-hdk.dtb
-dtb-y += $(sun_tuivm-dtb-y)
-
-endif
-endif
-
-ifeq ($(CONFIG_ARCH_TUNA), y)
-ifeq ($(CONFIG_ARCH_QTI_VM), y)
-tuna_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += tuna-vm-rumi.dtb \
-				tuna-vm-atp.dtb \
-				tuna-vm-cdp.dtb \
-				tuna-vm-mtp.dtb \
-				tuna-vm-mtp-kiwi.dtb \
-				tuna-vm-mtp-qmp1000.dtb \
-				tuna-vm-qrd.dtb \
-				tuna-vm-rcm.dtb \
-				tuna-vm-rcm-kiwi.dtb \
-				tunap-vm.dtb \
-				tuna7-vm.dtb \
-				tuna-oemvm-rumi.dtb \
-				tuna-oemvm-atp.dtb \
-				tuna-oemvm-cdp.dtb \
-				tuna-oemvm-mtp.dtb \
-				tuna-oemvm-mtp-kiwi.dtb \
-				tuna-oemvm-mtp-qmp1000.dtb \
-				tuna-oemvm-qrd.dtb \
-				tuna-oemvm-rcm.dtb \
-				tuna-oemvm-rcm-kiwi.dtb \
-				tunap-oemvm.dtb \
-				tuna7-oemvm.dtb
-dtb-y += $(tuna_tuivm-dtb-y)
-endif
-endif
-
-ifeq ($(CONFIG_ARCH_KERA), y)
-ifeq ($(CONFIG_ARCH_QTI_VM), y)
-kera_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += kera-vm-rumi.dtb \
-				kera-vm-atp.dtb \
-				kera-vm-cdp-qca6750.dtb \
-				kera-vm-mtp-qca6750.dtb \
-				kera-vm-mtp-wcn7750.dtb \
-				kera-vm-qrd-wcn7750.dtb \
-				kera-vm-rcm-qca6750.dtb \
-				kera-vm-rcm-wcn7750.dtb \
-				kera-oemvm-rumi.dtb \
-				kera-oemvm-atp.dtb \
-				kera-oemvm-cdp-qca6750.dtb \
-				kera-oemvm-mtp-qca6750.dtb \
-				kera-oemvm-mtp-wcn7750.dtb \
-				kera-oemvm-qrd-wcn7750.dtb \
-				kera-oemvm-rcm-qca6750.dtb \
-				kera-oemvm-rcm-wcn7750.dtb
-dtb-y += $(kera_tuivm-dtb-y)
-endif
-endif
-
-MONACO_BASE_DTB += monaco.dtb monacop.dtb
-
-MONACO_BOARDS += \
-        monaco-idp-v1-overlay.dtbo \
-        monaco-standalone-idp-v1-overlay.dtbo \
-        monaco-idp-v2-overlay.dtbo \
-        monaco-standalone-idp-v2-overlay.dtbo \
-        monaco-idp-v3-overlay.dtbo \
-        monaco-standalone-idp-v3-overlay.dtbo \
-        monaco-idp-v1.1-overlay.dtbo \
-        monaco-wdp-v1-overlay.dtbo \
-        monaco-wdp-v1.1-overlay.dtbo \
-        monaco-standalone-wdp-v1-overlay.dtbo \
-        monaco-atp-v1-overlay.dtbo \
-        monaco-standalone-atp-v1-overlay.dtbo
-
-monaco-dtb-$(CONFIG_ARCH_MONACO) += \
-        $(call add-overlays, $(MONACO_BOARDS) ,$(MONACO_BASE_DTB))
-monaco-overlays-dtb-$(CONFIG_ARCH_MONACO) += $(MONACO_BOARDS) $(MONACO_BASE_DTB)
-dtb-y += $(monaco-dtb-y)
-
-ifeq ($(CONFIG_ARCH_PARROT), y)
-ifeq ($(CONFIG_ARCH_QTI_VM), y)
-parrot_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += parrot-vm-rumi.dtb \
-			parrot-vm-atp.dtb \
-			parrot-vm-idp.dtb \
-			parrot-vm-idp-wcn3990.dtb \
-			parrot-vm-idp-wcn3990-amoled-rcm.dtb \
-			parrot-vm-idp-wcn6750-amoled.dtb \
-			parrot-vm-idp-wcn6750-amoled-rcm.dtb \
-			parrot-vm-qrd.dtb \
-			parrot-vm-qrd-wcn6750.dtb
-
-dtb-y += $(parrot_tuivm-dtb-y)
-
-endif
-endif
-
-ifeq ($(CONFIG_ARCH_RAVELIN), y)
-ifeq ($(CONFIG_ARCH_QTI_VM), y)
-parrot_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) +=  ravelin-vm-rumi.dtb \
-			ravelin-vm-atp.dtb \
-			ravelin-vm-idp.dtb \
-			ravelin-vm-idp-wcn3988.dtb \
-			ravelin-vm-idp-wcn3950-amoled-rcm.dtb \
-			ravelin-vm-qrd.dtb
-
-dtb-y += $(parrot_tuivm-dtb-y)
-
-endif
-endif
-
-always-y        := $(dtb-y)
-subdir-y        := $(dts-dirs)
-clean-files     := *.dtb *.dtbo
+# COPYRIGHT(C) 2024 Samsung Electronics Co., Ltd. All Right Reserved.
+dtstree         := $(srctree)/$(src)
+trg_boards      += $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+trg_boards      += $(patsubst $(dtstree)/%.dts,%.dtbo, $(wildcard $(dtstree)/*.dts))
+dtb-y    += $(trg_boards)
--- a/qcom/audio/Kbuild
+++ b/qcom/audio/Kbuild
@@ -1,3 +1,5 @@
+DTC_INCLUDE += $(srctree)/../sm8750-modules/qcom/opensource/audio-kernel/include
+
 ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
 dtbo-y += pineapple-audio.dtbo \
                 pineapple-audio-cdp.dtbo \
--- a/qcom/audio/Makefile
+++ b/qcom/audio/Makefile
@@ -1,19 +0,0 @@
-AUDIO_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M)
-AUDIO_KERNEL_ROOT=$(AUDIO_DEVICETREE_ROOT)/../../opensource/audio-kernel/include
-
-KBUILD_OPTIONS += KBUILD_DTC_INCLUDE=$(AUDIO_KERNEL_ROOT)
-KBUILD_OPTIONS += KBUILD_EXTMOD_DTS=.
-KBUILD_OPTIONS += KERNEL_ROOT=$(ROOT_DIR)/$(KERNEL_DIR)
-KBUILD_OPTIONS += MODNAME=audio-devicetree
-
-
-all: dtbs
-
-dtbs:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) dtbs $(KBUILD_OPTIONS)
-
-modules_install:
-	$(MAKE) M=$(M) -C $(KERNEL_SRC) modules_install
-
-clean:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
--- a/qcom/bt/Makefile
+++ b/qcom/bt/Makefile
@@ -1,9 +0,0 @@
-KBUILD_OPTIONS += KBUILD_EXTMOD_DTS=.
-
-all: dtbs
-
-clean:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
-
-%:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
--- a/qcom/camera/Kbuild
+++ b/qcom/camera/Kbuild
@@ -1,17 +1,6 @@
-# Use current $(MSM_ARCH) to set config/ makefile path
-CAMERA_TARGET_MKFILE_PATH := $(CAMERA_DEVICETREE_ROOT)/config/$(MSM_ARCH).mk
-# Check to see if current target makefile exists
-CAMERA_TARGET_EXISTS := $(or $(and $(wildcard $(CAMERA_TARGET_MKFILE_PATH)),y),n)
+DTC_INCLUDE += $(srctree)/../sm8750-modules/qcom/opensource/camera-kernel

-# Since Kernel SI can support multiple ARCH's this allows only the current selected target ARCH
-# to compile.
-ifeq ($(CAMERA_TARGET_EXISTS), y)
-include $(CAMERA_TARGET_MKFILE_PATH)
-else
-# Print a warning but do not throw an error to allow bring-up of new targets!
-$(warning [$(MODNAME)] $(MSM_ARCH) is not a valid target, make sure config\ folder contains a makefile named $(MSM_ARCH).mk)
-$(warning [$(MODNAME)] driver is NOT being enabled!)
-endif
+include $(srctree)/$(src)/config/sun.mk

 always-y	:= $(dtbo-y) $(dtb-y)
 subdir-y	:= $(dts-dirs)
--- a/qcom/camera/Makefile
+++ b/qcom/camera/Makefile
@@ -1,20 +0,0 @@
-
-CAMERA_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M)
-CAMERA_KERNEL_ROOT=$(CAMERA_DEVICETREE_ROOT)/../../opensource/camera-kernel
-
-KBUILD_OPTIONS += CAMERA_DEVICETREE_ROOT=$(KERNEL_SRC)/$(M)
-KBUILD_OPTIONS += KBUILD_DTC_INCLUDE=$(CAMERA_KERNEL_ROOT)
-KBUILD_OPTIONS += KBUILD_EXTMOD_DTS=.
-KBUILD_OPTIONS += KERNEL_ROOT=$(ROOT_DIR)/$(KERNEL_DIR)
-KBUILD_OPTIONS += MODNAME=camera-devicetree
-
-all: dtbs
-
-dtbs:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) dtbs $(KBUILD_OPTIONS)
-
-modules_install:
-	$(MAKE) M=$(M) -C $(KERNEL_SRC) modules_install
-
-clean:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
--- a/qcom/data/Makefile
+++ b/qcom/data/Makefile
@@ -1,9 +0,0 @@
-KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=.
-
-all: dtbs
-
-clean:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
-
-%:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
--- a/qcom/display/Makefile
+++ b/qcom/display/Makefile
@@ -1,9 +0,0 @@
-KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=.
-
-all: dtbs
-
-clean:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
-
-%:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
--- a/qcom/dsp/Makefile
+++ b/qcom/dsp/Makefile
@@ -1,9 +0,0 @@
-KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=.
-
-all: dtbs
-
-clean:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
-
-%:
-	$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
--- a/qcom/eSE/Kbuild
+++ b/qcom/eSE/Kbuild
@@ -0,0 +1,57 @@
+ifeq ($(CONFIG_ARCH_SUN),y)
+dtbo-y += sun-ese-mtp.dtbo
+dtbo-y += sun-ese-rcm-v8.dtbo
+dtbo-y += sun-ese-rcm.dtbo
+dtbo-y += sun-ese-mtp-kiwi-v8.dtbo
+dtbo-y += sun-ese-cdp-kiwi-v8.dtbo
+dtbo-y += sun-ese-atp.dtbo
+dtbo-y += sun-ese-qrd-sku1.dtbo
+dtbo-y += sun-ese-qrd-sku1-v8.dtbo
+dtbo-y += sun-ese-qrd-sku2-v8.dtbo
+dtbo-y += sun-ese-cdp.dtbo
+dtbo-y += sun-ese-qrd.dtbo
+dtbo-y += sun-v2-ese-mtp.dtbo
+dtbo-y += sun-v2-ese-cdp.dtbo
+dtbo-y += sun-v2-ese-qrd.dtbo
+endif
+
+ifeq ($(CONFIG_ARCH_TUNA),y)
+dtbo-y += tuna-ese-cdp.dtbo
+dtbo-y += tuna-ese-mtp.dtbo
+dtbo-y += tuna-ese-qrd.dtbo
+dtbo-y += tuna-ese-mtp-kiwi-overlay.dtbo
+dtbo-y += tuna-ese-mtp-kiwi-harmonium-overlay.dtbo
+dtbo-y += tuna-ese-rcm-kiwi-overlay.dtbo
+dtbo-y += tuna-ese-mtp-qmp1000-overlay.dtbo
+dtbo-y += tuna-ese-oemvm-mtp-kiwi.dtbo
+dtbo-y += tuna-ese-oemvm-rcm-kiwi.dtbo
+endif
+
+ifeq ($(CONFIG_ARCH_KERA),y)
+dtbo-y += kera-ese-atp.dtbo
+dtbo-y += kera-ese-cdp-qca6750-ufs2.dtbo
+dtbo-y += kera-ese-cdp-qca6750-ufs3.dtbo
+dtbo-y += kera-ese-cdp-qca6750-ufs4.dtbo
+dtbo-y += kera-ese-cdp.dtbo
+dtbo-y += kera-ese-mtp-qca6750-qmp1000.dtbo
+dtbo-y += kera-ese-mtp-qca6750.dtbo
+dtbo-y += kera-ese-mtp-wcn7750-qmp1000.dtbo
+dtbo-y += kera-ese-mtp-wcn7750-ufs3.dtbo
+dtbo-y += kera-ese-mtp-wcn7750-ufs4.dtbo
+dtbo-y += kera-ese-mtp.dtbo
+dtbo-y += kera-ese-oemvm-mtp.dtbo
+dtbo-y += kera-ese-oemvm-rcm.dtbo
+dtbo-y += kera-ese-qrd-wcn7750-ufs2.dtbo
+dtbo-y += kera-ese-qrd-wcn7750-ufs3.dtbo
+dtbo-y += kera-ese-qrd.dtbo
+dtbo-y += kera-ese-rcm-qca6750-ufs2.dtbo
+dtbo-y += kera-ese-rcm-qca6750-ufs3.dtbo
+dtbo-y += kera-ese-rcm-wcn7750-ufs2.dtbo
+dtbo-y += kera-ese-rcm-wcn7750-ufs3.dtbo
+dtbo-y += kera-ese-rcm-wcn7750-ufs4.dtbo
+dtbo-y += kera-ese-rcm.dtbo
+endif
+
+always-y	:= $(dtb-y) $(dtbo-y)
+subdir-y	:= $(dts-dirs)
+clean-files	:= *.dtb *.dtbo
--- a/qcom/eSE/kera-ese-atp.dts
+++ b/qcom/eSE/kera-ese-atp.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera ATP";
+	compatible = "qcom,kera-atp", "qcom,kera", "qcom,kerap-atp", "qcom,kerap",
+			"qcom,atp";
+
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <33 0>;
+};
--- a/qcom/eSE/kera-ese-cdp-qca6750-ufs2.dts
+++ b/qcom/eSE/kera-ese-cdp-qca6750-ufs2.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS2.0";
+	compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap",
+			"qcom,cdp";
+
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x30001 0>;
+};
--- a/qcom/eSE/kera-ese-cdp-qca6750-ufs3.dts
+++ b/qcom/eSE/kera-ese-cdp-qca6750-ufs3.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS3.0";
+	compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap",
+			"qcom,cdp";
+
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x20001 0>;
+};
--- a/qcom/eSE/kera-ese-cdp-qca6750-ufs4.dts
+++ b/qcom/eSE/kera-ese-cdp-qca6750-ufs4.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera CDP + QCA6750 + UFS4.0";
+	compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap",
+			"qcom,cdp";
+
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x40001 0>;
+};
--- a/qcom/eSE/kera-ese-cdp.dts
+++ b/qcom/eSE/kera-ese-cdp.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera CDP";
+	compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap",
+			"qcom,cdp";
+
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x10001 0>;
+};
--- a/qcom/eSE/kera-ese-common.dtsi
+++ b/qcom/eSE/kera-ese-common.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	st54spi_gpio {
+		status = "ok";
+		compatible = "st,st54spi_gpio";
+		/* gpio used as SE_nRESET */
+		gpio-power_nreset = <&tlmm 117 0x00>;
+	};
+};
--- a/qcom/eSE/kera-ese-mtp-qca6750-qmp1000.dts
+++ b/qcom/eSE/kera-ese-mtp-qca6750-qmp1000.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera MTP + QCA6750 + QMP1000";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			 "qcom,mtp";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x30008 0>;
+};
--- a/qcom/eSE/kera-ese-mtp-qca6750.dts
+++ b/qcom/eSE/kera-ese-mtp-qca6750.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera MTP + QCA6750";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			"qcom,mtp";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x20008 0>;
+};
--- a/qcom/eSE/kera-ese-mtp-wcn7750-qmp1000.dts
+++ b/qcom/eSE/kera-ese-mtp-wcn7750-qmp1000.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera MTP + WCN7750 + QMP1000";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			"qcom,mtp";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x30008 1>;
+};
--- a/qcom/eSE/kera-ese-mtp-wcn7750-ufs3.dts
+++ b/qcom/eSE/kera-ese-mtp-wcn7750-ufs3.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera MTP + WCN7750 + UFS3.0";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			"qcom,mtp";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x20008 1>;
+};
--- a/qcom/eSE/kera-ese-mtp-wcn7750-ufs4.dts
+++ b/qcom/eSE/kera-ese-mtp-wcn7750-ufs4.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera MTP + WCN7750 + UFS4.0";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			"qcom,mtp";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x10008 1>;
+};
+
--- a/qcom/eSE/kera-ese-mtp.dts
+++ b/qcom/eSE/kera-ese-mtp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera MTP";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			"qcom,mtp";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x10008 0>;
+};
--- a/qcom/eSE/kera-ese-oemvm-mtp.dts
+++ b/qcom/eSE/kera-ese-oemvm-mtp.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera OEMVM MTP";
+	compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap",
+			"qcom,mtp";
+	qcom,board-id = <0x10008 0>, <0x10008 1>, <0x20008 0>, <0x20008 1>, <0x30008 0>, <0x30008 1>;
+};
--- a/qcom/eSE/kera-ese-oemvm-rcm.dts
+++ b/qcom/eSE/kera-ese-oemvm-rcm.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera OEMVM RCM";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,board-id = <0x10015 0>, <0x10015 1>, <0x20015 0>, <0x20015 1>, <0x30015 0>, <0x30015 1>;
+};
--- a/qcom/eSE/kera-ese-qrd-wcn7750-ufs2.dts
+++ b/qcom/eSE/kera-ese-qrd-wcn7750-ufs2.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera QRD";
+	compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap",
+			"qcom,qrd";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x3000B 0>;
+};
--- a/qcom/eSE/kera-ese-qrd-wcn7750-ufs3.dts
+++ b/qcom/eSE/kera-ese-qrd-wcn7750-ufs3.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera QRD + WCN7750 + UFS3.0";
+	compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap",
+			"qcom,qrd";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x2000B 0>;
+};
--- a/qcom/eSE/kera-ese-qrd.dts
+++ b/qcom/eSE/kera-ese-qrd.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera QRD";
+	compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap",
+			"qcom,qrd";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x1000B 0>;
+};
--- a/qcom/eSE/kera-ese-rcm-qca6750-ufs2.dts
+++ b/qcom/eSE/kera-ese-rcm-qca6750-ufs2.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera RCM + QCA6750 + UFS2.0";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x30015 0>;
+};
--- a/qcom/eSE/kera-ese-rcm-qca6750-ufs3.dts
+++ b/qcom/eSE/kera-ese-rcm-qca6750-ufs3.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera RCM + QCA6750 + UFS3.0";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x20015 0>;
+};
--- a/qcom/eSE/kera-ese-rcm-wcn7750-ufs2.dts
+++ b/qcom/eSE/kera-ese-rcm-wcn7750-ufs2.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera RCM + WCN7750 + UFS2.0";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x30015 1>;
+};
--- a/qcom/eSE/kera-ese-rcm-wcn7750-ufs3.dts
+++ b/qcom/eSE/kera-ese-rcm-wcn7750-ufs3.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. KERA RCM + WCN7750 + UFS3.0";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x20015 1>;
+};
--- a/qcom/eSE/kera-ese-rcm-wcn7750-ufs4.dts
+++ b/qcom/eSE/kera-ese-rcm-wcn7750-ufs4.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera RCM + WCN7750 + UFS4.0";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x10015 1>;
+};
--- a/qcom/eSE/kera-ese-rcm.dts
+++ b/qcom/eSE/kera-ese-rcm.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kera RCM";
+	compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap",
+			"qcom,rcm";
+	qcom,msm-id = <686 0x10000>, <659 0x10000>;
+	qcom,board-id = <0x10015 0>;
+};
--- a/qcom/eSE/sun-ese-atp.dts
+++ b/qcom/eSE/sun-ese-atp.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun ATP";
+	compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp",
+			   "qcom,atp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x10021 0>;
+};
--- a/qcom/eSE/sun-ese-cdp-kiwi-v8.dts
+++ b/qcom/eSE/sun-ese-cdp-kiwi-v8.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN V8 Power Grid";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+ 		          <0x100026a 0x10000>, <0x100026a 0x20000>,
+ 		          <0x100027f 0x10000>, <0x100027f 0x20000>;
+ 	qcom,board-id = <0x60001 0>;
+};
--- a/qcom/eSE/sun-ese-cdp.dts
+++ b/qcom/eSE/sun-ese-cdp.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x1 0>, <0x20001 0>, <0x50001 0>;
+};
--- a/qcom/eSE/sun-ese-common.dtsi
+++ b/qcom/eSE/sun-ese-common.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	st54spi_gpio {
+		status = "ok";
+		compatible = "st,st54spi_gpio";
+		/* gpio used as SE_nRESET */
+		gpio-power_nreset = <&tlmm 46 0x00>;
+	};
+};
+
--- a/qcom/eSE/sun-ese-mtp-kiwi-v8.dts
+++ b/qcom/eSE/sun-ese-mtp-kiwi-v8.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN V8 Power Grid";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,board-id = <0x50008 0>;
+};
--- a/qcom/eSE/sun-ese-mtp.dts
+++ b/qcom/eSE/sun-ese-mtp.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>, <0x50008 0>;
+};
--- a/qcom/eSE/sun-ese-qrd-sku1-v8.dts
+++ b/qcom/eSE/sun-ese-qrd-sku1-v8.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+        model = "Qualcomm Technologies, Inc. Sun QRD SKU1 V8 Power Grid";
+        compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", "qcom,qrd";
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
+        qcom,board-id = <0x3000B 0>;
+};
--- a/qcom/eSE/sun-ese-qrd-sku1.dts
+++ b/qcom/eSE/sun-ese-qrd-sku1.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun QRD SKU1";
+	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", "qcom,qrd";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x1000B 0>;
+};
--- a/qcom/eSE/sun-ese-qrd-sku2-v8.dts
+++ b/qcom/eSE/sun-ese-qrd-sku2-v8.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+        model = "Qualcomm Technologies, Inc. Sun QRD SKU2 V8 Power Grid";
+        compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp","qcom,qrd";
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+                      <0x100027f 0x10000>, <0x100027f 0x20000>;
+        qcom,board-id = <0x2000B 0>;
+};
--- a/qcom/eSE/sun-ese-qrd.dts
+++ b/qcom/eSE/sun-ese-qrd.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun QRD";
+	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>;
+};
--- a/qcom/eSE/sun-ese-rcm-v8.dts
+++ b/qcom/eSE/sun-ese-rcm-v8.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun RCM V8 Power Grid";
+	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <0x100026a 0x10000>,<0x100026a 0x20000>;
+	qcom,board-id = <0x30015 0>;
+};
--- a/qcom/eSE/sun-ese-rcm.dts
+++ b/qcom/eSE/sun-ese-rcm.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-ese-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Sun RCM";
+	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp", "qcom,rcm";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x15 0>;
+};
--- a/qcom/eSE/sun-v2-ese-cdp.dts
+++ b/qcom/eSE/sun-v2-ese-cdp.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-v2-ese-common.dtsi"
+
+/ {
+    model = "Qualcomm Technologies, Inc. Sun CDP";
+    compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp";
+    //AS of now for V2 devices, we have mapped the msm-id and board id same as V1.
+    //We would update this once we receive the specs of V2 devices.
+    qcom,msm-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>;
+    qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>;
+};
--- a/qcom/eSE/sun-v2-ese-common.dtsi
+++ b/qcom/eSE/sun-v2-ese-common.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+    st54spi_gpio {
+        status = "ok";
+        compatible = "st,st54spi_gpio";
+        /* gpio used as SE_nRESET */
+        gpio-power_nreset = <&tlmm 46 0x00>;
+    };
+};
--- a/qcom/eSE/sun-v2-ese-mtp.dts
+++ b/qcom/eSE/sun-v2-ese-mtp.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-v2-ese-common.dtsi"
+
+/ {
+    model = "Qualcomm Technologies, Inc. Sun MTP";
+    compatible = "qcom, sun-mtp", "qcom,sun", "qcom,mtp";
+    //AS of now for V2 devices, we have mapped the msm-id and board id same as V1.
+    //We would update this once we receive the specs of V2 devices.
+    qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+    qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>;
+};
--- a/qcom/eSE/sun-v2-ese-qrd.dts
+++ b/qcom/eSE/sun-v2-ese-qrd.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-v2-ese-common.dtsi"
+
+/ {
+    model = "Qualcomm Technologies, Inc. Sun QRD";
+    compatible = "qcom,sun-qrd", "qcom,sun", "qcom,qrd";
+    //AS of now for V2 devices, we have mapped the msm-id and board id same as V1. 
+    //We would update this once we receive the specs of V2 devices.
+    qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+    qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>;
+};
--- a/qcom/eSE/tuna-ese-cdp.dts
+++ b/qcom/eSE/tuna-ese-cdp.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna CDP";
+	compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,tunap-cdp", "qcom,tunap",
+			"qcom,cdp";
+
+	qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
+	qcom,board-id = <1 0>;
+};
--- a/qcom/eSE/tuna-ese-common.dtsi
+++ b/qcom/eSE/tuna-ese-common.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	st54spi_gpio {
+		status = "ok";
+		compatible = "st,st54spi_gpio";
+		/* gpio used as SE_nRESET */
+		gpio-power_nreset = <&tlmm 111 0x00>;
+	};
+};
+
--- a/qcom/eSE/tuna-ese-mtp-kiwi-harmonium-overlay.dts
+++ b/qcom/eSE/tuna-ese-mtp-kiwi-harmonium-overlay.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN + Harmonium";
+	compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap",
+			"qcom,mtp";
+	qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
+	qcom,board-id = <8 3>;
+};
--- a/qcom/eSE/tuna-ese-mtp-kiwi-overlay.dts
+++ b/qcom/eSE/tuna-ese-mtp-kiwi-overlay.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN";
+	compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap",
+			"qcom,mtp";
+	qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
+	qcom,board-id = <8 2>;
+};
--- a/qcom/eSE/tuna-ese-mtp-qmp1000-overlay.dts
+++ b/qcom/eSE/tuna-ese-mtp-qmp1000-overlay.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna MTP QMP1000";
+	compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap",
+			"qcom,mtp";
+	qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
+	qcom,board-id = <8 1>;
+};
--- a/qcom/eSE/tuna-ese-mtp.dts
+++ b/qcom/eSE/tuna-ese-mtp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna MTP";
+	compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap",
+			"qcom,mtp";
+	qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
+	qcom,board-id = <8 0>;
+};
--- a/qcom/eSE/tuna-ese-oemvm-mtp-kiwi.dts
+++ b/qcom/eSE/tuna-ese-oemvm-mtp-kiwi.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna OEMVM MTP + kiwi WLAN";
+	compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap",
+			"qcom,mtp";
+	qcom,board-id = <8 2>;
+};
--- a/qcom/eSE/tuna-ese-oemvm-rcm-kiwi.dts
+++ b/qcom/eSE/tuna-ese-oemvm-rcm-kiwi.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna OEMVM RCM + kiwi WLAN";
+	compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap",
+			"qcom,rcm";
+	qcom,board-id = <21 1>;
+};
--- a/qcom/eSE/tuna-ese-qrd.dts
+++ b/qcom/eSE/tuna-ese-qrd.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna QRD";
+	compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,tunap-qrd", "qcom,tunap",
+			"qcom,qrd";
+	qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
+	qcom,board-id = <11 0>;
+};
--- a/qcom/eSE/tuna-ese-rcm-kiwi-overlay.dts
+++ b/qcom/eSE/tuna-ese-rcm-kiwi-overlay.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-ese-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Tuna RCM + kiwi WLAN";
+	compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap",
+			"qcom,rcm";
+	qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
+	qcom,board-id = <21 1>;
+};
--- a/qcom/eva/Kbuild
+++ b/qcom/eva/Kbuild
@@ -0,0 +1,25 @@
+ifneq ($(CONFIG_ARCH_QTI_VM), y)
+
+ifeq ($(CONFIG_ARCH_SUN), y)
+dtbo-y += sun-eva.dtbo
+dtbo-y += sun-eva-v2.dtbo
+endif
+
+ifeq ($(CONFIG_ARCH_TUNA), y)
+dtbo-y += tuna-eva.dtbo
+endif
+
+ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
+dtbo-y += pineapple-eva.dtbo
+endif
+
+ifeq ($(CONFIG_ARCH_KALAMA), y)
+dtbo-y += trustedvm-kalama-eva-mtp.dtbo \
+	trustedvm-kalama-eva-qrd.dtbo
+endif
+
+endif
+
+always-y	:= $(dtb-y) $(dtbo-y)
+subdir-y	:= $(dts-dirs)
+clean-files	:= *.dtb *.dtbo
--- a/qcom/eva/bindings/msm-eva-bus.yaml
+++ b/qcom/eva/bindings/msm-eva-bus.yaml
@@ -0,0 +1,107 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/msm-eva-bus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. MSM CVP BUS
+
+description: |
+   Second level nodes - Buses
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - qcom,msm-cvp,bus
+  label:
+    description: an arbitrary name
+  qcom,bus-master:
+    description:
+      an integer descriptor of the bus master. Refer to arch/arm/\
+      boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of
+      acceptable masters
+  qcom,bus-slave:
+    description:
+      an integer descriptor of the bus slave. Refer to arch/arm/\
+      boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of
+      acceptable slaves
+  qcom,bus-governor:
+    description:
+      governor to use when scaling bus, generally any commonly
+      found devfreq governor might be used.  In addition to those governors,
+      the custom Venus governors, "msm-vidc-ddr" or "msm-vidc-llcc" are also
+      acceptable values.
+      In the absence of this property the "performance" governor is used.
+  qcom,bus-rage-kbps:
+    description:
+      an array of two items (<min max>) that indicate the
+      minimum and maximum acceptable votes for the bus.
+      In the absence of this property <0 INT_MAX> is used.
+  qcom,ubwc-10bit:
+    description:
+      UBWC 10 bit content has different bus requirements,
+      this tag will be used to pick the appropriate bus as per the session
+      profile as shown below in example.
+
+required:
+  - compatible
+  - label
+  - qcom,bus-master
+  - qcom,bus-slave
+
+examples:
+  - |
+    msm_cvp: qcom,cvp@ab00000 {
+        compatible = "qcom,msm-cvp", "qcom,Lahaina-cvp";
+        status = "ok";
+        reg = <0xab00000 0x100000>;
+        interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+
+        /* FIXME: LLCC Info */
+        /* cache-slice-names = "vidsc0", "vidsc1"; */
+        /* cache-slices = <&llcc 2>, <&llcc 3>; */
+
+        /* Supply */
+        cvp-supply = <&mvs1_gdsc>;
+
+        /* Clocks */
+        clock-names =  "gcc_video_axi0",
+            "gcc_video_axi1", "cvp_clk";
+        clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
+            <&clock_gcc GCC_VIDEO_AXI1_CLK>,
+            <&clock_videocc VIDEO_CC_MVS1_CLK>;
+        qcom,proxy-clock-names = "gcc_video_axi0", "gcc_video_axi1",
+            "cvp_clk";
+
+        qcom,clock-configs = <0x0 0x0 0x1>;
+        qcom,allowed-clock-rates = <403000000 520000000
+            549000000 666000000 800000000>;
+
+        /* Buses */
+        bus_cnoc {
+            compatible = "qcom,msm-cvp,bus";
+            label = "cnoc";
+            qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
+            qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
+            qcom,bus-governor = "performance";
+            qcom,bus-range-kbps = <1000 1000>;
+        };
+
+        /* MMUs */
+        non_secure_cb {
+            compatible = "qcom,msm-cvp,context-bank";
+            label = "cvp_hlos";
+            iommus = <&apps_smmu 0x2120 0x400>;
+            qcom,iommu-dma = "disabled";
+            buffer-types = <0xfff>;
+            virtual-addr-pool = <0x4b000000 0xe0000000>;
+        };
+
+        /* Memory Heaps */
+        qcom,msm-cvp,mem_cdsp {
+            compatible = "qcom,msm-cvp,mem-cdsp";
+            memory-region = <&cdsp_mem>;
+        };
+    };
--- a/qcom/eva/bindings/msm-eva-cb.yaml
+++ b/qcom/eva/bindings/msm-eva-cb.yaml
@@ -0,0 +1,108 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/msm-eva-cb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. MSM CVP CB
+
+description: |
+   Second level nodes - Context Banks
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - qcom,msm-cvp,context-bank
+  iommus:
+    description:
+      A phandle parsed by smmu driver. Number of entries will vary
+
+  label:
+    description:
+      string describing iommu domain usage.
+  buffer-types:
+    description:
+      bitmap of buffer types that can be mapped into the current IOMMU domain.
+      Buffer types are defined as the following
+        input = 0x1
+        output = 0x2
+        output2 = 0x4
+        extradata input = 0x8
+        extradata output = 0x10
+        extradata output2 = 0x20
+        internal scratch = 0x40
+        internal scratch1 = 0x80
+        internal scratch2 = 0x100
+        internal persist = 0x200
+        internal persist1 = 0x400
+        internal cmd queue = 0x800
+  virtual-addr-pool:
+    description:
+      offset and length of virtual address pool.
+  qcom,fw-context-bank:
+    description:
+      bool indicating firmware context bank.
+  qcom,secure-context-bank:
+    description:
+      bool indicating secure context bank.
+
+required:
+  - compatible
+  - iommus
+
+examples:
+  - |
+    msm_cvp: qcom,cvp@ab00000 {
+        compatible = "qcom,msm-cvp", "qcom,Lahaina-cvp";
+        status = "ok";
+        reg = <0xab00000 0x100000>;
+        interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+
+        /* FIXME: LLCC Info */
+        /* cache-slice-names = "vidsc0", "vidsc1"; */
+        /* cache-slices = <&llcc 2>, <&llcc 3>; */
+
+        /* Supply */
+        cvp-supply = <&mvs1_gdsc>;
+
+        /* Clocks */
+        clock-names =  "gcc_video_axi0",
+            "gcc_video_axi1", "cvp_clk";
+        clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
+            <&clock_gcc GCC_VIDEO_AXI1_CLK>,
+            <&clock_videocc VIDEO_CC_MVS1_CLK>;
+        qcom,proxy-clock-names = "gcc_video_axi0", "gcc_video_axi1",
+            "cvp_clk";
+
+        qcom,clock-configs = <0x0 0x0 0x1>;
+        qcom,allowed-clock-rates = <403000000 520000000
+            549000000 666000000 800000000>;
+
+        /* Buses */
+        bus_cnoc {
+            compatible = "qcom,msm-cvp,bus";
+            label = "cnoc";
+            qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
+            qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
+            qcom,bus-governor = "performance";
+            qcom,bus-range-kbps = <1000 1000>;
+        };
+
+        /* MMUs */
+        non_secure_cb {
+            compatible = "qcom,msm-cvp,context-bank";
+            label = "cvp_hlos";
+            iommus = <&apps_smmu 0x2120 0x400>;
+            qcom,iommu-dma = "disabled";
+            buffer-types = <0xfff>;
+            virtual-addr-pool = <0x4b000000 0xe0000000>;
+        };
+
+        /* Memory Heaps */
+        qcom,msm-cvp,mem_cdsp {
+            compatible = "qcom,msm-cvp,mem-cdsp";
+            memory-region = <&cdsp_mem>;
+        };
+    };
--- a/qcom/eva/bindings/msm-eva-heap.yaml
+++ b/qcom/eva/bindings/msm-eva-heap.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/msm-eva-heap.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. MSM CVP HEAP
+
+description: |
+   Second level nodes - Memory Heaps
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - qcom,msm-vidc,mem-cdsp
+  memory-region:
+    description:
+      phandle to the memory heap/region.
+
+required:
+  - compatible
+  - memory-region
+
+examples:
+  - |
+    msm_cvp: qcom,cvp@ab00000 {
+        compatible = "qcom,msm-cvp", "qcom,Lahaina-cvp";
+        status = "ok";
+        reg = <0xab00000 0x100000>;
+        interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+
+        /* FIXME: LLCC Info */
+        /* cache-slice-names = "vidsc0", "vidsc1"; */
+        /* cache-slices = <&llcc 2>, <&llcc 3>; */
+
+        /* Supply */
+        cvp-supply = <&mvs1_gdsc>;
+
+        /* Clocks */
+        clock-names =  "gcc_video_axi0",
+            "gcc_video_axi1", "cvp_clk";
+        clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
+            <&clock_gcc GCC_VIDEO_AXI1_CLK>,
+            <&clock_videocc VIDEO_CC_MVS1_CLK>;
+        qcom,proxy-clock-names = "gcc_video_axi0", "gcc_video_axi1",
+            "cvp_clk";
+
+        qcom,clock-configs = <0x0 0x0 0x1>;
+        qcom,allowed-clock-rates = <403000000 520000000
+            549000000 666000000 800000000>;
+
+        /* Buses */
+        bus_cnoc {
+            compatible = "qcom,msm-cvp,bus";
+            label = "cnoc";
+            qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
+            qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
+            qcom,bus-governor = "performance";
+            qcom,bus-range-kbps = <1000 1000>;
+        };
+
+        /* MMUs */
+        non_secure_cb {
+            compatible = "qcom,msm-cvp,context-bank";
+            label = "cvp_hlos";
+            iommus = <&apps_smmu 0x2120 0x400>;
+            qcom,iommu-dma = "disabled";
+            buffer-types = <0xfff>;
+            virtual-addr-pool = <0x4b000000 0xe0000000>;
+        };
+
+        /* Memory Heaps */
+        qcom,msm-cvp,mem_cdsp {
+            compatible = "qcom,msm-cvp,mem-cdsp";
+            memory-region = <&cdsp_mem>;
+        };
+    };
--- a/qcom/eva/bindings/msm-eva.yaml
+++ b/qcom/eva/bindings/msm-eva.yaml
@@ -0,0 +1,125 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/msm-eva.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. MSM CVP
+
+description: |
+  Root level node - cvp
+
+properties:
+  # A dictionary of DT properties for this binding schema
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - qcom,msm-cvp
+              - qcom,sun-cvp
+              - qcom,pineapple-cvp
+              - qcom,kalama-cvp
+              - qcom,waipio-cvp
+              - qcom,lahaina-cvp
+              - qcom,kona-cvp
+
+  reg:
+    description:
+      offset and length of the CSR register set for the device.
+  interrupts:
+    description:
+      should contain the cvp interrupt.
+  qcom,reg-presets:
+    description:
+      list of offset-value pairs for registers to be written.
+      The offsets are from the base offset specified in 'reg'. This is mainly
+      used for QoS, VBIF, etc. presets for video.
+  qcom,qdss-presets:
+    description:
+      list of physical address and memory allocation size pairs.
+      when fw_debug_mode is set as HFI_DEBUG_MODE_QDSS, all firmware
+      messages will be written to QDSS memory.
+  ‘*-supply’:
+    description:
+      A phandle pointing to the appropriate regulator. Number of
+      regulators vary across targets.
+  clock-names:
+    description:
+      an array of clocks that the driver is supposed to be
+      manipulating. The clocks names here correspond to the clock names
+      used in clk_get(<name>).
+  qcom,clock-configs:
+    description:
+      an array of bitmaps of clocks' configurations. The index of the
+      bitmap corresponds to the clock at the same index in qcom,clock-names.
+      The bitmaps describes the actions that the device needs to take
+      regarding the clock (i.e. scale it based on load).
+      The bitmap is defined as scalable = 0x1
+      (if the driver should vary the clock's frequency based on load)
+  qcom,allowed-clock-rates:
+    description:
+      an array of supported clock rates by the chipset.
+  qcom,use-non-secure-pil:
+    description:
+      A bool indicating which type of pil to use to load the fw.
+  qcom,fw-bias:
+    description:
+      The address at which cvp fw is loaded (manually).
+
+required:
+  - compatible
+
+examples:
+  - |
+    msm_cvp: qcom,cvp@ab00000 {
+        compatible = "qcom,msm-cvp", "qcom,Lahaina-cvp";
+        status = "ok";
+        reg = <0xab00000 0x100000>;
+        interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+
+        /* FIXME: LLCC Info */
+        /* cache-slice-names = "vidsc0", "vidsc1"; */
+        /* cache-slices = <&llcc 2>, <&llcc 3>; */
+
+        /* Supply */
+        cvp-supply = <&mvs1_gdsc>;
+
+        /* Clocks */
+        clock-names =  "gcc_video_axi0",
+            "gcc_video_axi1", "cvp_clk";
+        clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
+            <&clock_gcc GCC_VIDEO_AXI1_CLK>,
+            <&clock_videocc VIDEO_CC_MVS1_CLK>;
+        qcom,proxy-clock-names = "gcc_video_axi0", "gcc_video_axi1",
+            "cvp_clk";
+
+        qcom,clock-configs = <0x0 0x0 0x1>;
+        qcom,allowed-clock-rates = <403000000 520000000
+            549000000 666000000 800000000>;
+
+        /* Buses */
+        bus_cnoc {
+            compatible = "qcom,msm-cvp,bus";
+            label = "cnoc";
+            qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
+            qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
+            qcom,bus-governor = "performance";
+            qcom,bus-range-kbps = <1000 1000>;
+        };
+
+        /* MMUs */
+        non_secure_cb {
+            compatible = "qcom,msm-cvp,context-bank";
+            label = "cvp_hlos";
+            iommus = <&apps_smmu 0x2120 0x400>;
+            qcom,iommu-dma = "disabled";
+            buffer-types = <0xfff>;
+            virtual-addr-pool = <0x4b000000 0xe0000000>;
+        };
+
+        /* Memory Heaps */
+        qcom,msm-cvp,mem_cdsp {
+            compatible = "qcom,msm-cvp,mem-cdsp";
+            memory-region = <&cdsp_mem>;
+        };
+    };
--- a/qcom/eva/pineapple-eva.dts
+++ b/qcom/eva/pineapple-eva.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/qcom,ipcc.h>
+#include <dt-bindings/interconnect/qcom,pineapple.h>
+#include <dt-bindings/clock/qcom,videocc-pineapple.h>
+#include <dt-bindings/clock/qcom,gcc-pineapple.h>
+#include <dt-bindings/arm/msm/qti-smmu-proxy-dt-ids.h>
+#include "pineapple-eva.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. pineapple v1,v2 SoC";
+	compatible = "qcom,pineapple";
+	qcom,msm-id = <557 0x10000>, <557 0x20000>;
+	qcom,board-id = <0 0>, <15 0>, <8 0>, <11 0>, <1 0>;
+};
--- a/qcom/eva/pineapple-eva.dtsi
+++ b/qcom/eva/pineapple-eva.dtsi
@@ -0,0 +1,140 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	msm_cvp: qcom,cvp@ab00000 {
+		compatible = "qcom,msm-cvp", "qcom,pineapple-cvp";
+		status = "ok";
+		reg = <0xab00000 0x100000>;
+		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+
+		/* LLCC Cache */
+		cache-slice-names = "cvp";
+
+		/* Supply */
+		cvp-supply = <&video_cc_mvs1c_gdsc>;
+		cvp-core-supply = <&video_cc_mvs1_gdsc>;
+
+		/* Clocks */
+		clock-names = "gcc_video_axi1", "sleep_clk", "cvp_clk", "core_clk",
+				"video_cc_mvs1_clk_src";
+		clock-ids = <GCC_VIDEO_AXI1_CLK VIDEO_CC_SLEEP_CLK VIDEO_CC_MVS1C_CLK
+			VIDEO_CC_MVS1_CLK VIDEO_CC_MVS1_CLK_SRC>;
+		clocks = <&gcc GCC_VIDEO_AXI1_CLK>,
+			<&videocc VIDEO_CC_SLEEP_CLK>,
+			<&videocc VIDEO_CC_MVS1C_CLK>,
+			<&videocc VIDEO_CC_MVS1_CLK>,
+			<&videocc VIDEO_CC_MVS1_CLK_SRC>;
+		qcom,proxy-clock-names = "gcc_video_axi1", "sleep_clk",
+			"cvp_clk", "core_clk", "video_cc_mvs1_clk_src";
+
+		qcom,clock-configs = <0x0 0x0 0x0 0x0 0x1>;
+		qcom,allowed-clock-rates = <350000000 450000000 500000000 550000000>;
+
+		resets = <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
+		    <&videocc VIDEO_CC_XO_CLK_ARES>,
+			<&videocc VIDEO_CC_MVS1C_CLK_ARES>;
+		reset-names = "cvp_axi_reset", "cvp_xo_reset","cvp_core_reset";
+		reset-power-status = <0x0 0x1 0x0>;
+
+		qcom,reg-presets = <0xB0088 0x0>;
+		qcom,ipcc-reg = <0x400000 0x100000>;
+		qcom,gcc-reg = <0x110000 0x40000>;
+
+		pas-id = <26>;
+		memory-region = <&cvp_mem>;
+
+		/* UC region mapping */
+		ipclite_mappings = <0xFE500000 0x100000 0x82600000>;
+		/* DEVICE mapping */
+		aon_timer_mappings = <0xFFA00000 0x1000 0xc220000>;
+		/* DEVICE mapping */
+		hwmutex_mappings = <0xFFB00000 0x2000 0x1f4a000>;
+		/* DEVICE mapping */
+		aon_mappings = <0xFF80F000 0x1000 0x0ABE0000>;
+
+		/* CVP Firmware ELF image name */
+		cvp,firmware-name = "evass";
+
+		/* Buses */
+		cvp_cnoc {
+			compatible = "qcom,msm-cvp,bus";
+			qcom,bus-governor = "performance";
+			qcom,bus-range-kbps = <1000 1000>;
+			interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>;
+			interconnect-names = "eva-cfg";
+		};
+
+		cvp_bus_ddr {
+			compatible = "qcom,msm-cvp,bus";
+			qcom,bus-governor = "performance";
+			qcom,bus-range-kbps = <1000 6533000>;
+			interconnects = <&mmss_noc MASTER_VIDEO_PROC &mc_virt SLAVE_EBI1>;
+			interconnect-names = "eva-ddr";
+		};
+
+		/* MMUs */
+		/* Camera cb is used to get secure camera buffer IPA */
+		cvp_camera_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_camera";
+			buffer-types = <0xfff>;
+			qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_EVA_CB>;
+		};
+
+		non_secure_cb_group: cvp_non_secure_cb_group {
+			qcom,iommu-dma-addr-pool = <0x4b000000 0x90000000>;
+			qcom,iommu-faults = "non-fatal";
+		};
+
+		cvp_non_secure_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_hlos";
+			iommus =
+				<&apps_smmu 0x1920 0x0000>;
+			buffer-types = <0xfff>;
+			dma-coherent;
+			qcom,iommu-group = <&non_secure_cb_group>;
+		};
+
+
+		cvp_secure_nonpixel_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_sec_nonpixel";
+			iommus =
+				<&apps_smmu 0x1924 0x0000>;
+			buffer-types = <0x741>;
+			qcom,iommu-faults = "non-fatal";
+			qcom,iommu-dma-addr-pool = <0x01000000 0x25800000>;
+			qcom,iommu-vmid = <0xB>;
+		};
+
+		cvp_secure_pixel_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_sec_pixel";
+			iommus =
+				<&apps_smmu 0x1923 0x0000>;
+			buffer-types = <0x106>;
+			qcom,iommu-faults = "non-fatal";
+			qcom,iommu-dma-addr-pool = <0x26800000 0x24800000>;
+			qcom,iommu-vmid = <0xA>;
+		};
+
+		cvp_dsp_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_dsp";
+			iommus =
+				<&apps_smmu 0x1920 0x0000>;
+			buffer-types = <0xfff>;
+			qcom,iommu-group = <&non_secure_cb_group>;
+		};
+
+		/* Memory Heaps */
+		qcom,msm-cvp,mem_cdsp {
+			compatible = "qcom,msm-cvp,mem-cdsp";
+			memory-region = <&cdsp_eva_mem>;
+		};
+	};
+};
--- a/qcom/eva/sun-eva-v2.dts
+++ b/qcom/eva/sun-eva-v2.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/qcom,ipcc.h>
+#include <dt-bindings/interconnect/qcom,sun.h>
+#include <dt-bindings/clock/qcom,videocc-sun.h>
+#include <dt-bindings/clock/qcom,gcc-sun.h>
+#include <dt-bindings/clock/qcom,evacc-sun.h>
+#include <dt-bindings/arm/msm/qti-smmu-proxy-dt-ids.h>
+#include "sun-eva-v2.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun v2 SoC";
+	compatible = "qcom,sun";
+	qcom,msm-id = <618 0x20000>, <639 0x20000>, <0x100026a 0x20000>, <0x100027f 0x20000>;
+	qcom,board-id = <0 0>, <15 0>, <8 0>, <11 0>, <1 0>;
+};
--- a/qcom/eva/sun-eva-v2.dtsi
+++ b/qcom/eva/sun-eva-v2.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "sun-eva.dtsi"
+
+&msm_cvp {
+	qcom,allowed-clock-rates = <350000000 400000000 450000000 500000000 550000000>;
+	soc_ver = <0x20000>;
+};
+
--- a/qcom/eva/sun-eva.dts
+++ b/qcom/eva/sun-eva.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/qcom,ipcc.h>
+#include <dt-bindings/interconnect/qcom,sun.h>
+#include <dt-bindings/clock/qcom,videocc-sun.h>
+#include <dt-bindings/clock/qcom,gcc-sun.h>
+#include <dt-bindings/clock/qcom,evacc-sun.h>
+#include <dt-bindings/arm/msm/qti-smmu-proxy-dt-ids.h>
+#include "sun-eva.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. sun v1 SoC";
+	compatible = "qcom,sun";
+	qcom,msm-id = <618 0x10000>, <639 0x10000>, <0x100026a 0x10000>, <0x100027f 0x10000>;
+	qcom,board-id = <0 0>, <15 0>, <8 0>, <11 0>, <1 0>;
+};
--- a/qcom/eva/sun-eva.dtsi
+++ b/qcom/eva/sun-eva.dtsi
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	msm_cvp: qcom,cvp@ab00000 {
+		compatible = "qcom,msm-cvp", "qcom,sun-cvp";
+		status = "ok";
+		reg = <0xab00000 0x100000>;
+		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+
+		/* LLCC Cache */
+		cache-slice-names = "cvpfw", "cvp";
+
+		/* Supply */
+		cvp-supply = <&eva_cc_mvs0c_gdsc>;
+		cvp-core-supply = <&eva_cc_mvs0_gdsc>;
+
+		/* Clocks */
+		clock-names = "cvp_axi_clock", "core_axi_clock", "sleep_clk", "cvp_freerun_clk", "core_freerun_clk",
+		"cvp_clk", "core_clk","eva_cc_mvs0_clk_src";
+		clock-ids = <GCC_EVA_AXI0C_CLK GCC_EVA_AXI0_CLK EVA_CC_SLEEP_CLK EVA_CC_MVS0C_FREERUN_CLK EVA_CC_MVS0_FREERUN_CLK EVA_CC_MVS0C_CLK
+			EVA_CC_MVS0_CLK EVA_CC_MVS0_CLK_SRC>;
+		clocks = <&gcc GCC_EVA_AXI0C_CLK>,
+		    <&gcc GCC_EVA_AXI0_CLK>,
+			<&evacc EVA_CC_SLEEP_CLK>,
+			<&evacc EVA_CC_MVS0C_FREERUN_CLK>,
+			<&evacc EVA_CC_MVS0_FREERUN_CLK>,
+			<&evacc EVA_CC_MVS0C_CLK>,
+			<&evacc EVA_CC_MVS0_CLK>,
+			<&evacc EVA_CC_MVS0_CLK_SRC>;
+		qcom,proxy-clock-names = "cvp_axi_clock", "core_axi_clock", "sleep_clk", "cvp_freerun_clk", "core_freerun_clk",
+		"cvp_clk", "core_clk", "eva_cc_mvs0_clk_src";
+
+		qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1>;
+		qcom,allowed-clock-rates = <350000000 400000000 450000000 500000000 550000000>;
+
+		/*To be added - GCC_EVA CLK_ARES and GCC_EVA_AXI0C_CLK_ARES*/
+		resets = <&evacc EVA_CC_MVS0C_CLK_ARES>;
+		reset-names = "cvp_core_reset";
+		reset-power-status = <0x0>;
+
+		qcom,reg-presets = <0xB0088 0x0>;
+		qcom,ipcc-reg = <0x400000 0x100000>;
+		qcom,gcc-reg = <0x110000 0x90000>;
+
+		pas-id = <26>;
+		soc_ver = <0x10000>;
+		memory-region = <&cvp_mem>;
+
+		/* UC region mapping */
+		ipclite_mappings = <0xFE500000 0x100000 0x82600000>;
+		/* DEVICE mapping */
+		aon_timer_mappings = <0xFFA00000 0x1000 0xc220000>;
+		/* DEVICE mapping */
+		hwmutex_mappings = <0xFFB00000 0x2000 0x1f4a000>;
+		/* DEVICE mapping */
+		aon_mappings = <0xFF80F000 0x1000 0x0ABE0000>;
+
+		/* CVP Firmware ELF image name */
+		cvp,firmware-name = "evass";
+
+		/* Buses */
+		cvp_cnoc {
+			compatible = "qcom,msm-cvp,bus";
+			qcom,bus-governor = "performance";
+			qcom,bus-range-kbps = <1000 1000>;
+			interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_EVA_CFG>;
+			interconnect-names = "eva-cfg";
+		};
+
+		cvp_bus_ddr {
+			compatible = "qcom,msm-cvp,bus";
+			qcom,bus-governor = "performance";
+			qcom,bus-range-kbps = <1000 6533000>;
+			interconnects = <&mmss_noc MASTER_VIDEO_EVA &mc_virt SLAVE_EBI1>;
+			interconnect-names = "eva-ddr";
+		};
+
+		/* MMUs */
+		/* Camera cb is used to get secure camera buffer IPA */
+		cvp_camera_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_camera";
+			buffer-types = <0xfff>;
+			qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_EVA_CB>;
+		};
+
+		non_secure_cb_group: cvp_non_secure_cb_group {
+			qcom,iommu-faults = "non-fatal";
+		};
+
+		cvp_iommu_region_partition: cvp_iommu_region_partition {
+			/* These IOVA regions are unique per context bank */
+			iommu-addresses = <&cvp_non_secure_cb 0x0 0x4b000000>, <&cvp_non_secure_cb 0xdb000000 0x25000000>,
+				<&cvp_dsp_cb 0x0 0x4b000000>, <&cvp_dsp_cb 0xdb000000 0x25000000>,
+				<&cvp_secure_nonpixel_cb 0x0 0x01000000>, <&cvp_secure_nonpixel_cb 0x26800000 0xd9800000>,
+				<&cvp_secure_pixel_cb 0x0 0x26800000>, <&cvp_secure_pixel_cb 0x4b000000 0xb5000000>;
+		};
+
+		cvp_non_secure_cb: cvp_non_secure_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_hlos";
+			iommus =
+				<&apps_smmu 0x1920 0x0020>;
+			buffer-types = <0xfff>;
+			dma-coherent;
+			qcom,iommu-group = <&non_secure_cb_group>;
+			memory-region = <&cvp_iommu_region_partition>;
+		};
+
+
+		cvp_secure_nonpixel_cb: cvp_secure_nonpixel_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_sec_nonpixel";
+			iommus =
+				<&apps_smmu 0x1924 0x0020>;
+			buffer-types = <0x741>;
+			qcom,iommu-faults = "non-fatal";
+			memory-region = <&cvp_iommu_region_partition>;
+			qcom,iommu-vmid = <0xB>;
+		};
+
+		cvp_secure_pixel_cb: cvp_secure_pixel_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_sec_pixel";
+			iommus =
+				<&apps_smmu 0x1923 0x0000>;
+			buffer-types = <0x106>;
+			qcom,iommu-faults = "non-fatal";
+			memory-region = <&cvp_iommu_region_partition>;
+			qcom,iommu-vmid = <0xA>;
+		};
+
+		cvp_dsp_cb: cvp_dsp_cb {
+			compatible = "qcom,msm-cvp,context-bank";
+			label = "cvp_dsp";
+			iommus =
+				<&apps_smmu 0x1920 0x0020>;
+			buffer-types = <0xfff>;
+			qcom,iommu-group = <&non_secure_cb_group>;
+			memory-region = <&cvp_iommu_region_partition>;
+		};
+		/* Memory Heaps */
+		qcom,msm-cvp,mem_cdsp {
+			compatible = "qcom,msm-cvp,mem-cdsp";
+			memory-region = <&cdsp_eva_mem>;
+		};
+	};
+};
--- a/qcom/eva/trustedvm-kalama-eva-mtp.dts
+++ b/qcom/eva/trustedvm-kalama-eva-mtp.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/qcom,ipcc.h>
+#include <dt-bindings/interconnect/qcom,kalama.h>
+#include <dt-bindings/clock/qcom,videocc-kalama.h>
+#include <dt-bindings/clock/qcom,gcc-kalama.h>
+#include "trustedvm-kalama-eva.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kalama MTP";
+	compatible = "qcom,kalama-mtp", "qcom,kalama", "qcom,mtp";
+	qcom,msm-id = <519 0x10000>, <536 0x10000>;
+	qcom,board-id = <0x10008 0>;
+};
--- a/qcom/eva/trustedvm-kalama-eva-qrd.dts
+++ b/qcom/eva/trustedvm-kalama-eva-qrd.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/qcom,ipcc.h>
+#include <dt-bindings/interconnect/qcom,kalama.h>
+#include <dt-bindings/clock/qcom,videocc-kalama.h>
+#include <dt-bindings/clock/qcom,gcc-kalama.h>
+#include "trustedvm-kalama-eva.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Kalama QRD";
+	compatible = "qcom,kalama-qrd", "qcom,kalama", "qcom,qrd";
+	qcom,msm-id = <519 0x10000>, <536 0x10000>;
+	qcom,board-id = <0x1000B 0>;
+};
--- a/qcom/eva/trustedvm-kalama-eva.dtsi
+++ b/qcom/eva/trustedvm-kalama-eva.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	msm_cvp: qcom,cvp@ab00000 {
+		compatible = "qcom,msm-cvp", "qcom,kalama-cvp-tvm";
+		status = "ok";
+	};
+};
--- a/Show More
+++ b/Show More