ARM: DTS: msm: Enable Sign Of Life(SOL) for Sun + Peach

SOL is side band mechanism to communicate with device
and reset device from the bad state. Enable SOL for
sun  to recover from device hung issue during PCIe link
down cases.

HOST_SOL -------> Host to Device GPIO
DEV_SOL --------> Device to Host GPIO

Change-Id: Ib4bf76fa60692acf85546dca7a7148f9c4062ca6
CRs-Fixed: 3715142
This commit is contained in:
Naman Padhiar
2024-01-24 18:13:03 +05:30
parent e80c8c19bf
commit 33a716df43
2 changed files with 60 additions and 2 deletions

View File

@@ -50,6 +50,32 @@
function = "wcn_sw";
};
};
cnss_host_sol_default: cnss_host_sol_default {
mux {
pins = "gpio202";
function = "gpio";
};
config {
pins = "gpio202";
drive-strength = <4>;
bias-pull-down;
};
};
cnss_dev_sol_default: cnss_dev_sol_default {
mux {
pins = "gpio203";
function = "gpio";
};
config {
pins = "gpio203";
drive-strength = <4>;
bias-pull-down;
};
};
};
};
@@ -74,14 +100,17 @@
wlan-en-gpio = <&tlmm 16 0>;
qcom,bt-en-gpio = <&pm8550ve_f_gpios 3 0>;
qcom,sw-ctrl-gpio = <&tlmm 18 0>;
wlan-host-sol-gpio = <&tlmm 202 0>;
wlan-dev-sol-gpio = <&tlmm 203 0>;
/* List of GPIOs to be setup for interrupt wakeup capable */
mpm_wake_set_gpios = <18 19>;
pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
"sw_ctrl_wl_cx";
"sw_ctrl_wl_cx", "sol_default";
pinctrl-0 = <&cnss_wlan_en_active>;
pinctrl-1 = <&cnss_wlan_en_sleep>;
pinctrl-2 = <&cnss_wlan_sw_ctrl>;
pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
pinctrl-4 = <&cnss_host_sol_default &cnss_dev_sol_default>;
qcom,wlan;
qcom,wlan-rc-num = <0>;
qcom,wlan-ramdump-dynamic = <0x780000>;

View File

@@ -49,6 +49,32 @@
function = "wcn_sw";
};
};
cnss_host_sol_default: cnss_host_sol_default {
mux {
pins = "gpio202";
function = "gpio";
};
config {
pins = "gpio202";
drive-strength = <4>;
bias-pull-down;
};
};
cnss_dev_sol_default: cnss_dev_sol_default {
mux {
pins = "gpio203";
function = "gpio";
};
config {
pins = "gpio203";
drive-strength = <4>;
bias-pull-down;
};
};
};
};
@@ -73,14 +99,17 @@
wlan-en-gpio = <&tlmm 16 0>;
qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>;
qcom,sw-ctrl-gpio = <&tlmm 18 0>;
wlan-host-sol-gpio = <&tlmm 202 0>;
wlan-dev-sol-gpio = <&tlmm 203 0>;
/* List of GPIOs to be setup for interrupt wakeup capable */
mpm_wake_set_gpios = <18 19>;
pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
"sw_ctrl_wl_cx";
"sw_ctrl_wl_cx", "sol_default";
pinctrl-0 = <&cnss_wlan_en_active>;
pinctrl-1 = <&cnss_wlan_en_sleep>;
pinctrl-2 = <&cnss_wlan_sw_ctrl>;
pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
pinctrl-4 = <&cnss_host_sol_default &cnss_dev_sol_default>;
qcom,wlan;
qcom,wlan-rc-num = <0>;
qcom,wlan-ramdump-dynamic = <0x780000>;