From 33a716df43efde8171ce5da49936ce9cdc9ce7b2 Mon Sep 17 00:00:00 2001
From: Naman Padhiar <quic_npadhiar@quicinc.com>
Date: Wed, 24 Jan 2024 18:13:03 +0530
Subject: [PATCH] ARM: DTS: msm: Enable Sign Of Life(SOL) for Sun + Peach

SOL is side band mechanism to communicate with device
and reset device from the bad state. Enable SOL for
sun  to recover from device hung issue during PCIe link
down cases.

HOST_SOL -------> Host to Device GPIO
DEV_SOL --------> Device to Host GPIO

Change-Id: Ib4bf76fa60692acf85546dca7a7148f9c4062ca6
CRs-Fixed: 3715142
---
 sun-peach-cnss-v8.dtsi | 31 ++++++++++++++++++++++++++++++-
 sun-peach-cnss.dtsi    | 31 ++++++++++++++++++++++++++++++-
 2 files changed, 60 insertions(+), 2 deletions(-)

diff --git a/sun-peach-cnss-v8.dtsi b/sun-peach-cnss-v8.dtsi
index d9e6cfa1..44f7fe1a 100644
--- a/sun-peach-cnss-v8.dtsi
+++ b/sun-peach-cnss-v8.dtsi
@@ -50,6 +50,32 @@
 				function = "wcn_sw";
 			};
 		};
+
+		cnss_host_sol_default: cnss_host_sol_default {
+			mux {
+				pins = "gpio202";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio202";
+				drive-strength = <4>;
+				bias-pull-down;
+			};
+		};
+
+		cnss_dev_sol_default: cnss_dev_sol_default {
+			mux {
+				pins = "gpio203";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio203";
+				drive-strength = <4>;
+				bias-pull-down;
+			};
+		};
 	};
 };
 
@@ -74,14 +100,17 @@
 		wlan-en-gpio = <&tlmm 16 0>;
 		qcom,bt-en-gpio = <&pm8550ve_f_gpios 3 0>;
 		qcom,sw-ctrl-gpio = <&tlmm 18 0>;
+		wlan-host-sol-gpio = <&tlmm 202 0>;
+		wlan-dev-sol-gpio = <&tlmm 203 0>;
 		/* List of GPIOs to be setup for interrupt wakeup capable */
 		mpm_wake_set_gpios = <18 19>;
 		pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
-				"sw_ctrl_wl_cx";
+				"sw_ctrl_wl_cx", "sol_default";
 		pinctrl-0 = <&cnss_wlan_en_active>;
 		pinctrl-1 = <&cnss_wlan_en_sleep>;
 		pinctrl-2 = <&cnss_wlan_sw_ctrl>;
 		pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
+		pinctrl-4 = <&cnss_host_sol_default &cnss_dev_sol_default>;
 		qcom,wlan;
 		qcom,wlan-rc-num = <0>;
 		qcom,wlan-ramdump-dynamic = <0x780000>;
diff --git a/sun-peach-cnss.dtsi b/sun-peach-cnss.dtsi
index 62e6bfa5..da2d3bc4 100644
--- a/sun-peach-cnss.dtsi
+++ b/sun-peach-cnss.dtsi
@@ -49,6 +49,32 @@
 				function = "wcn_sw";
 			};
 		};
+
+		cnss_host_sol_default: cnss_host_sol_default {
+			mux {
+				pins = "gpio202";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio202";
+				drive-strength = <4>;
+				bias-pull-down;
+			};
+		};
+
+		cnss_dev_sol_default: cnss_dev_sol_default {
+			mux {
+				pins = "gpio203";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio203";
+				drive-strength = <4>;
+				bias-pull-down;
+			};
+		};
 	};
 };
 
@@ -73,14 +99,17 @@
 		wlan-en-gpio = <&tlmm 16 0>;
 		qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>;
 		qcom,sw-ctrl-gpio = <&tlmm 18 0>;
+		wlan-host-sol-gpio = <&tlmm 202 0>;
+		wlan-dev-sol-gpio = <&tlmm 203 0>;
 		/* List of GPIOs to be setup for interrupt wakeup capable */
 		mpm_wake_set_gpios = <18 19>;
 		pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
-				"sw_ctrl_wl_cx";
+				"sw_ctrl_wl_cx", "sol_default";
 		pinctrl-0 = <&cnss_wlan_en_active>;
 		pinctrl-1 = <&cnss_wlan_en_sleep>;
 		pinctrl-2 = <&cnss_wlan_sw_ctrl>;
 		pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
+		pinctrl-4 = <&cnss_host_sol_default &cnss_dev_sol_default>;
 		qcom,wlan;
 		qcom,wlan-rc-num = <0>;
 		qcom,wlan-ramdump-dynamic = <0x780000>;