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c6e78953ec2a45e5a255b976ebb03b591223ca09
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Author SHA1 Message Date
Linux Image Build Automation
c6e78953ec Revert "ARM: dts: msm: update pm qos for sun target" 
This reverts commit edfe9f46a5.

Change-Id: I30632b67e4542f93e06d3258465a40d658fc29db
Signed-off-by: Linux Image Build Automation <quic_ibautomat@quicinc.com>
 2024-07-31 14:25:29 -07:00
Linux Image Build Automation
351096e02c Revert "ARM: dts: msm: move esync RCG to SDE DSI node" 
This reverts commit 89f184dd38.

Change-Id: Ie469eea85132ee553518a3f3453c2a19c8ce0514
Signed-off-by: Linux Image Build Automation <quic_ibautomat@quicinc.com>
 2024-07-31 14:25:17 -07:00
Linux Image Build Automation
54ea574e80 Revert "ARM: dts: msm: add HDR capability for panels on sun target" 
This reverts commit 0888108bdd.

Change-Id: Ibc4feea05e5be0ac6d4a49670c1d928475564676
Signed-off-by: Linux Image Build Automation <quic_ibautomat@quicinc.com>
 2024-07-31 14:22:02 -07:00
Qing Huang
0888108bdd ARM: dts: msm: add HDR capability for panels on sun target 
Change adds HDR capability for panels on sun target

Change-Id: I2e4dc6e037c3dc465103ee9c1c4465be7173c841
Signed-off-by: Qing Huang <quic_huangq@quicinc.com>
(cherry picked from commit 6d718caa81)
 2024-07-27 14:56:55 -07:00
Kirill Shpin
89f184dd38 ARM: dts: msm: move esync RCG to SDE DSI node 
Driver needs to set esync clock's parent under a gating condition,
which is not available at the point where the clocks under MDSS DSI
node are parsed. Moves the esync RCG clock to SDE DSI instead.

Change-Id: I01e0fedbc7620425d237024663da944e2f7ae9cf
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
 2024-07-25 23:40:33 -07:00
Raviteja Tamatam
edfe9f46a5 ARM: dts: msm: update pm qos for sun target 
Update sde-qos-cpu-mask value for sun target.

Change-Id: I1e3a94b276d7ac31d693bdc73a46cc40189d5c43
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
 2024-07-25 23:40:27 -07:00
Linux Build Service Account
bae0e443b9 Merge 9cf4eed8f4 on remote branch 
Change-Id: I1d9eccb056f31f98719d456cb91b413ea68ae66c
 2024-07-22 00:16:09 -07:00
Linux Image Build Automation
7668b35d02 Revert "ARM: dts: msm: add sde_rscc register offset to cesta for sun target" 
This reverts commit 4b3bee8622.

Change-Id: I56f2cbf8c58119733393bf12c63ed3d2127a91fc
Signed-off-by: Linux Image Build Automation <quic_ibautomat@quicinc.com>
 2024-07-17 01:31:57 -07:00
lnxdisplay
9cf4eed8f4 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3869217           Idc43ba7b ARM: dts: msm: add VHM properties to bindings

CRs-Included: 3869217 .

Change-Id: Ibfc57558e97e40050b44e7ea56b9b0fa41f42fb3
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-07-15 11:18:29 +05:30
Veera Sundaram Sankaran
4b3bee8622 ARM: dts: msm: add sde_rscc register offset to cesta for sun target 
Add the sde_rscc register offset to help in accessing the cesta
status registers.

Change-Id: I438002605a1bdf3ca06c92f4594a71bce70ef387
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
 2024-07-10 14:05:58 -07:00
Kirill Shpin
ca2fc6dff7 ARM: dts: msm: add VHM properties to bindings 
Adds VHM related device tree properties to bindings and documents
their meaning and usage.

Change-Id: Idc43ba7bcfe1c8d9960aa00b3d807b74789d57f0
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
 2024-07-10 11:39:05 -07:00
lnxdisplay
4761b271a6 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3805307           I43800260 ARM: dts: msm: add sde_rscc register offset to cesta for sun target

CRs-Included: 3805307 .

Change-Id: If59f5f44c7333e1628ccb9d761b637f5910e21b8
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-07-11 00:07:44 +05:30
QCTECMDR Service
d4b04ab574 Merge "ARM: dts: msm: add sde_rscc register offset to cesta for sun target" 2024-07-08 12:08:23 -07:00
Linux Build Service Account
6c2ba9b656 Merge d18d597d6d on remote branch 
Change-Id: I26e3e310476b3f785a202d40bfda1525a77a676f
 2024-07-05 16:36:12 -07:00
lnxdisplay
55067045f7 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3843158           Iad0635b0 ARM: dts: msm: add pll_codes_region for secondary DSI PHY

CRs-Included: 3843158 .

Change-Id: I2305913bc0efd742d060c3dd1f9bd513b29740ba
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-07-04 10:31:08 +05:30
QCTECMDR Service
a92918fb7f Merge "ARM: dts: msm: add pll_codes_region for secondary DSI PHY" 2024-07-01 22:51:19 -07:00
Rui Chen
d06aefb55d ARM: dts: msm: add pll_codes_region for secondary DSI PHY 
Add pll_codes_region propertity for secondary DSI PHY to
support DSI dynamic clock switch feature.

Change-Id: Iad0635b013094c833f9fb2304b5bbaf728f23360
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
 2024-06-27 18:30:26 -07:00
lnxdisplay
d18d597d6d Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3826752           I41e2e5b3 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target
3811582           I127af4c4 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target

CRs-Included: 3811582,3826752 .

Change-Id: I795934afe85e0e56cf44e9ba82fc65cab00dc83b
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-28 03:15:33 +05:30
QCTECMDR Service
06b66fa9e0 Merge "ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target" 2024-06-27 01:26:49 -07:00
lnxdisplay
05a5ea52c1 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3786154           I6ec180fa ARM: dts: msm: add the identification of rc_override_v1
3786154           Ib889643b bindings: Documentation: add flag for override rc_range_bpg_ofs
3835358           I4756cd2f ARM: dts: msm: enable partial update for spr cmd dphy mode
3842907           I9d1da6be ARM: dts: msm: Add pentile pack type for SPR on sun target

CRs-Included: 3786154,3842907,3835358 .

Change-Id: Ia3a01a8012be31b3ecbd47f9620ab7e1556c281a
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-21 21:07:30 +05:30
Abhinav Saurabh
dc3f289df8 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target 
Update in height alignments from 40 to 20 for FHD 60FPS cmd mode to
match DSC slice settings. The values should be integral multiple of
height defined for panel.

Change-Id: I41e2e5b3ec0b75a6eb2f39879356c92239853f74
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
 2024-06-21 03:19:34 -07:00
QCTECMDR Service
1d7cbb1213 Merge "ARM: dts: msm: add the identification of rc_override_v1" 2024-06-20 16:21:20 -07:00
Veera Sundaram Sankaran
cdc4bd6588 ARM: dts: msm: add sde_rscc register offset to cesta for sun target 
Add the sde_rscc register offset to help in accessing the cesta
status registers.

Change-Id: I438002605a1bdf3ca06c92f4594a71bce70ef387
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
 2024-06-20 15:39:50 -07:00
Linux Build Service Account
5219000572 Merge dc018d6c56 on remote branch 
Change-Id: I3d1d0c70b74a1f5839521b2253b64cb5466764ab
 2024-06-20 14:43:36 -07:00
qctecmdr
0c29083782 Merge "bindings: Documentation: add flag for override rc_range_bpg_ofs" 2024-06-19 15:21:43 -07:00
Xhoendi Collaku
e6fa678d85 Revert "ARM: dts: msm: update clock rate for csot panel cphy cmd mode" 
This reverts commit b8a176c81d.

Reason for revert: Release revert

Change-Id: I7b9abd0923157850216955843265dce438b97adb
 2024-06-18 21:59:13 -07:00
qctecmdr
7c40d0e683 Merge "ARM: dts: msm: Add pentile pack type for SPR on sun target" 2024-06-18 16:31:23 -07:00
Jinfeng Gu
fddd02548e ARM: dts: msm: add the identification of rc_override_v1 
This change adds the identification of rc_override_v1 and remove
24/20Hz for wqhd command dphy mode due to panel limitation.

Change-Id: I6ec180fa5ffe25ca914ecd270bbe55c3a64e14d8
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-06-18 17:47:41 +08:00
qctecmdr
d38c5d16f5 Merge "ARM: dts: msm: enable partial update for spr cmd dphy mode" 2024-06-17 10:32:51 -07:00
lnxdisplay
7ab2d73ade Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3812803           I01035e33 ARM: dts: msm: add CSOT vid with SPR config

CRs-Included: 3812803 .

Change-Id: I4d762a618a041c38213dbe9a59e8c83d56499a47
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-17 12:51:38 +05:30
qctecmdr
333474e9f1 Merge "ARM: dts: msm: add CSOT vid with SPR config" 2024-06-15 13:45:08 -07:00
lnxdisplay
dc018d6c56 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3831391           I09ac2d1a ARM: dts: msm: add esync pinctrl and clocks
3826326           Ie34c339d ARM: dts: msm: add NT37801 dphy mode with bypass DDIC SPR support

CRs-Included: 3826326,3831391 .

Change-Id: I1ad206272237b2e44513b80971714b4dd7d758d7
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-11 16:14:34 +05:30
Jinfeng Gu
b8a176c81d ARM: dts: msm: update clock rate for csot panel cphy cmd mode 
This change increased clock rate with 3% config for cphy cmd mode.

Change-Id: If8e7668a42e29f21a0f2cb2ef67fa60147c6786f
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-06-07 15:59:17 -07:00
Jinfeng Gu
dfe2218e11 bindings: Documentation: add flag for override rc_range_bpg_ofs 
Add "qcom,mdss-dsc-rc-override_v1" flag to enable
override rc_range_bpg_ofs in sde_dsc_rc_range_bpg_override_v1.

Change-Id: Ib889643b097dff81f2896afbde48e7273e46a097
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-06-07 16:59:01 +08:00
Jinfeng Gu
a64265d79f ARM: dts: msm: enable partial update for spr cmd dphy mode 
This change enable partial update for spr cmd dphy mode.

Change-Id: I4756cd2f2e64c69922018bae026a47ad00bc23f3
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-06-06 14:56:05 +08:00
Linux Build Service Account
8734c95c7e Merge 1c73731eab on remote branch 
Change-Id: I34cf5f86318e5128ad1a11c51354875007578314
 2024-06-04 21:59:35 -07:00
qctecmdr
44357ae6f6 Merge "ARM: dts: msm: add esync pinctrl and clocks" 2024-06-04 18:09:31 -07:00
Linux Image Build Automation
d2aaaf9f4a Revert "ARM: dts: msm: update clock rate for cphy cmd mode at 120Hz & 90Hz" 
This reverts commit 661ebda22d.

Change-Id: I687b32224352e1561e1f4f022a903079701452f2
Signed-off-by: Linux Image Build Automation <quic_ibautomat@quicinc.com>
 2024-06-03 16:27:30 -07:00
qctecmdr
a65088bd55 Merge "ARM: dts: msm: add NT37801 dphy mode with bypass DDIC SPR support" 2024-05-31 17:52:22 -07:00
Kirill Shpin
bdedd83bd9 ARM: dts: msm: add esync pinctrl and clocks 
Adds pinctrl configuration to pass esync signal through from hw block
to output pin. Also adds esync and oscillator clocks, and makes the
DSI PLL clock available to parse for setting clock parent.

Change-Id: I09ac2d1a334546452176285712d8c953f94aecf2
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
 2024-05-31 11:41:38 -07:00
lnxdisplay
2c01bb5b20 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3801040           I3e89dd85 ARM: dts: msm: update clock rate for csot panel cphy cmd mode

CRs-Included: 3801040 .

Change-Id: Ieb9a8d1e15956029d6167d51052b55f3f99c7c3b
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-31 23:58:29 +05:30
qctecmdr
850855a2e5 Merge "ARM: dts: msm: update clock rate for csot panel cphy cmd mode" 2024-05-31 07:09:55 -07:00
Kirill Shpin
bfd823d9c5 ARM: dts: msm: add CSOT vid with SPR config 
Adds variant of CSOT panel with AP SPR in video mode.

Change-Id: I01035e333822b37c4ebc5ab4cd1d728d0638e979
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
 2024-05-28 11:03:48 +08:00
lnxdisplay
a0761040bf Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3819934           Idb98ba40 ARM: dts: msm: add scaling up code for FHD+ csot panel

CRs-Included: 3819934 .

Change-Id: I998a3053a455ee1dad6c73b75a3b3e27d64533c3
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-27 15:14:39 +05:30
Yuchao Ma
2225cc899e ARM: dts: msm: Add pentile pack type for SPR on sun target 
This change adds pentile pack type for SPR on sun target.

Change-Id: I9d1da6be1262d806e1e8f1820fd3b844d40cfbf3
Signed-off-by: Yuchao Ma <quic_yuchaom@quicinc.com>
 2024-05-27 13:29:03 +08:00
Jinfeng Gu
661ebda22d ARM: dts: msm: update clock rate for cphy cmd mode at 120Hz & 90Hz 
This change updates clock rate for cphy cmd mode at 120Hz & 90Hz.

Change-Id: I3e89dd8596ac72712a4e4c38cb69249b6a815c47
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-05-25 00:42:29 -07:00
qctecmdr
026077d30b Merge "ARM: dts: msm: add scaling up code for FHD+ csot panel" 2024-05-24 16:48:33 -07:00
Jinfeng Gu
2f83057496 ARM: dts: msm: add NT37801 dphy mode with bypass DDIC SPR support 
This change add NT37801 dphy mode with bypass DDIC SPR support.

Change-Id: Ie34c339d0406867ecc934e3ce55a19bb580d88ca
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-05-24 18:37:14 +08:00
lnxdisplay
1c73731eab Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3811582           I127af4c4 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target

CRs-Included: 3811582 .

Change-Id: I90fd91007a7c98d8c8baf8c1893e6c9b98ca754f
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-23 05:27:06 +05:30
Jinfeng Gu
ffb6324600 ARM: dts: msm: update clock rate for csot panel cphy cmd mode 
This change increased clock rate with 3% config for cphy cmd mode.

Change-Id: I3e89dd8596ac72712a4e4c38cb69249b6a815c47
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-05-22 15:21:48 +08:00