Adds pinctrl configuration to pass esync signal through from hw block
to output pin. Also adds esync and oscillator clocks, and makes the
DSI PLL clock available to parse for setting clock parent.
Change-Id: I09ac2d1a334546452176285712d8c953f94aecf2
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>