Enable the UFS MCQ feature on the Kera platforms.
Change-Id: I3e6349010c442666bef9a7b7c24dcd22e9d717b4
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add support for clk8_a4 as fixed factor clock for client to be
able to request on them for Kera platform.
Change-Id: I3f6fe7e444231be4489cf4459b1f98cc19417b48
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
The Kera UFS 2.x requires a reference clock of 19.2MHz. Currently,
the reference clock provided by the DTSI node RPMH_LN_BB_CLK3
returns clk_get_rate() as 38.4MHz.
To address this, the handler is updated to use clk8_a4, ensuring the
clock rate is set to 19.2MHz.
Change-Id: I92ad772c7b86652c0dc5bdc3af18a9db900d74e5
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Signed-off-by: Vishvanath Singh <quic_vishvana@quicinc.com>
Add idle states for CPU and CPU clusters, add PSCI device to
enable CPU to enter LPMs.
Additionally, update APPS RSC device to be in cluster power
domain to handle RSC activites when cluster is powering off.
Change-Id: Ibe2fa720bc5e81084d380b2e5dc4f8fa8910566c
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
* changes:
ARM: dts: msm: Add usb-role-switch and eud on kera
ARM: dts: msm: Define maximum number of USB XHCI interrupters
ARM: dts: msm: update touch io base address to spi qup node for kera
The USB D+/D- signal lines are first routed through the WCD939x USB
subsystem before connecting to the USB controller on MTP and QRD
platform for kera. Add a phandle to the former to the USB device
node. This will allow the USB driver to control the D+/D- switches
when functionality is needed.
Change-Id: Ie6e76885785cc57974d52df91297a98f300cf666
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Updated the HLOS Audio LPM memory region for Kera is causing bootup
crash.
Keep the HLOS Audio LPM memory region for Kera same as base target sun
and tuna.
Fixes: 87876b303b ("ARM: dts: qcom: Update HLOS Audio LPM memory region for kera")
Change-Id: I99ff160e4679b92dce337bd66d2ee1898a4470f0
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
To support cable detection events from UCSI, updates need to be made
to enable usb role switch and setting up a connection to the UCSI PMIC
glink node.
Change-Id: Ic3a848f882072a766b3efb872f943dd3f4220ba1
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
This change will add usb-role-switch and eud in Kera.
Change-Id: I74ca8c0e19b45d925bcecc78e993439441339e20
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
DWC3 host and XHCI plat now communicates the maximum number of interrupters
the XHCI HCD will allocate. Since platforms only require a limited number
of interrupters (i.e. 3) make sure XHCI doesn't allocate more than is
required.
Change-Id: I466748df07aba6d7bdc79c7b2b17b3a57c58d3d4
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Disable sys-therm-11 node for kera as it is not required in kera
platforms.
While at it disable amoled-ecm for pmiv0102 kera platforms.
Change-Id: I983c49129182d40d32efc79d062bfbf41684580b
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
- Removal of I2S0_DATA1 pin, as GPIO_63 is not
used internally for I2S purpose and it is being
used by other subsystem.
Change-Id: I7c3636f9dfcebc68ed3da95793c158e70ad95184
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
Add proxy enable properties to the DSI core and panel supplies
to support continuous splash for Kera.
Change-Id: Iac767f1f9fd51159ec9650370ab7caa0a6e695a5
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Kera IoT platform required pcie_1 clocks support. Add support
to model pcie_1 clocks and gdsc's for Kera IoT devices.
Change-Id: I5ada397442568c9e91b099e8cb4ea5234fb4b76e
Signed-off-by: Smeet Raj <quic_smeeraj@quicinc.com>
eUSB2 HPG revision 1.0.2 recommends to program eusb register
USB_PHY_CFG_CTRL_1 to be programmed to 0x00 on phy init.
Since this divergence is only applicable for specific version therefore
updating the override sequence with the appropriate value.
Change-Id: Iaf84875c20e9c2c030b3f81eec9348a63f081105
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
