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ARM: dts: msm: Fake UFS Ref clock to run on HS mode

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Change-Id: I0045b2df13f1d6e6bcf0e4ee5c5553a7c0560807

Signed-off-by: Vishvanath Singh <quic_vishvana@quicinc.com>
This commit is contained in:
Vishvanath Singh
2024-12-29 01:10:07 -08:00
parent 1e24f978b0
commit d5c176fe3b
1 changed files with 34 additions and 0 deletions
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34
qcom/kera_ufs2.dtsi
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@@ -57,5 +57,39 @@
qcom,vccq2-parent-supply = <&S1B>;
qcom,vccq2-parent-max-microamp = <210000>;
clock-names =
"core_clk",
"bus_aggr_clk",
"iface_clk",
"core_clk_unipro",
"core_clk_ice",
"ref_clk",
"tx_lane0_sync_clk",
"rx_lane0_sync_clk",
"rx_lane1_sync_clk",
"dev_ref_clk";
clocks =
<&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
<&rpmhcc RPMH_LN_BB_CLK3>;
freq-table-hz =
<100000000 403000000>,
<0 0>,
<0 0>,
<100000000 403000000>,
<100000000 403000000>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>;
status = "ok";
};