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Author SHA1 Message Date
qctecmdr
a297faa3b2 Merge "ARM: dts: qcom: allow L2J regulator retention mode voting on Sun boards" 2024-04-16 21:00:31 -07:00
qctecmdr
de2bbac7e2 Merge "ARM: dts: msm: Add power domain for kgsl-smmu for sun" 2024-04-16 16:45:46 -07:00
qctecmdr
91017aaef4 Merge "ARM: dts: qcom: add UIDs for QTEE service in sun OEMVM" 2024-04-16 16:45:45 -07:00
qctecmdr
c661ab4776 Merge "ARM: dts: msm: Mark gpucc clock node as GenPD provider" 2024-04-16 16:45:45 -07:00
qctecmdr
85ecd55185 Merge "ARM: dts: msm: Enable qcom,tee-shared-memory-bridge device in OEMVM" 2024-04-16 16:45:45 -07:00
qctecmdr
1bbd4c6667 Merge "ARM: dts: msm: Use upstream smmu addr space prop for qup" 2024-04-15 12:33:36 -07:00
qctecmdr
ff8efc3e8f Merge "ARM: dts: msm: Add initial device tree for parrot" 2024-04-15 12:33:36 -07:00
qctecmdr
50e68c3438 Merge "ARM: dts: msm: Update pinctrl compatible for monaco" 2024-04-15 10:24:18 -07:00
qctecmdr
f562958903 Merge "ARM: dts: msm: Change I3C pin functions to gpio mode for AON usecase" 2024-04-12 08:39:12 -07:00
qctecmdr
cdceabc917 Merge "ARM: dts: msm: add GPIO CTI trigger support on sun" 2024-04-12 06:20:07 -07:00
Pradnya Dahiwale
25686b1d9d ARM: dts: msm: Update pinctrl compatible for monaco 
Update pinctrl compatible for monaco.

Change-Id: I95fa242ad133737f9d82d8ff91ec841a9f7863ca
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
 2024-04-12 13:31:55 +05:30
qctecmdr
ae46773118 Merge "ARM: dts: msm: Correct the ibi interrupt number" 2024-04-12 00:45:24 -07:00
Anil Veshala Veshala
c75e149845 ARM: dts: msm: Use upstream smmu addr space prop for qup 
FR92369: Memory team has noticed that buses drivers are using the
legacy "qcom,iommu-dma-addr-pool" DT property and suggested to use
Upstream compatible "iommu-addresses" DT property by this change
there is no impact in functionality.

Change-Id: Ib8b25b2b58ffd12d30672bce3afc75276637c4e1
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
 2024-04-12 11:38:57 +05:30
qctecmdr
7c5a85fad3 Merge "Revert "ARM: dts: msm: Add GenPD phy regulator to PCIe node"" 2024-04-11 20:03:05 -07:00
qctecmdr
868580303d Merge "ARM: dts: msm: Add register entry to ssusb in sun" 2024-04-11 17:51:26 -07:00
qctecmdr
cd4e9fbf25 Merge "ARM: dts: msm: Reserve ipa space for dmabuf for Sun TUIVM" 2024-04-11 17:51:26 -07:00
Swetha Chikkaboraiah
db1d959604 ARM: dts: msm: Add initial device tree for parrot 
Add initial device tree support for parrot  target.
This is a snapshot of dtsi files as of KP.1.0
'commit <3a433cd2ffb4> ("ARM: dts: msm: Add
ext-region prop of cpusysvm for parrot")'.

Change-Id: I582a3d131b94551da5f6d819003ab1a15ecd36f1
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
 2024-04-11 12:14:38 +05:30
songrui
911136c109 ARM: dts: msm: Enable qcom,tee-shared-memory-bridge device in OEMVM 
smcinvoke driver needs share memory bridge.

Change-Id: Ifc14e52a3593062c666f6ba92b8b5ad7c6a53456
Signed-off-by: songrui <quic_songrui@quicinc.com>
 2024-04-10 23:40:38 -07:00
songrui
db8644fd13 ARM: dts: qcom: add UIDs for QTEE service in sun OEMVM 
"0x39" for CSecureCamera2.

Change-Id: Id80d3af47a6fb4d27ce2826802bb11a6483895e9
Signed-off-by: songrui <quic_songrui@quicinc.com>
 2024-04-11 10:18:02 +08:00
qctecmdr
df5683bebe Merge "ARM: dts: msm: Remove system health monitor node" 2024-04-10 09:48:17 -07:00
Sudarshan Rajagopalan
2543984e7c ARM: dts: msm: Reserve ipa space for dmabuf for Sun TUIVM 
Reserve the IPA space for dmabuf buffers.

Change-Id: If3cb329278f5bdccee883f1d8a05df745df5ac5d
Signed-off-by: Sudarshan Rajagopalan <quic_sudaraja@quicinc.com>
 2024-04-10 01:38:53 -07:00
qctecmdr
a29c9e3c5f Merge "ARM: dts: msm: Add ddr voting to llcc bwmons for sun" 2024-04-09 14:44:07 -07:00
qctecmdr
fb20f2718a Merge "dt-bindings: pinctrl: qcom,x1e80100-tlmm: restrict number of interrupts" 2024-04-09 12:47:24 -07:00
qctecmdr
00818bd306 Merge "ARM: dts: msm: dt snapshot for monaco target" 2024-04-09 10:00:31 -07:00
qctecmdr
c56ace7502 Merge "dt-bindings: pinctrl: Add documentation for monaco TLMM block" 2024-04-09 10:00:31 -07:00
Amir Vajid
a92554f7e7 ARM: dts: msm: Add ddr voting to llcc bwmons for sun 
Enable secondary ddr voting on llcc bwmons for sun
and remove existing ddr bwmon given this enablement.

Change-Id: Icbb1ad3fbf7b44bf66a64f3cc8cefe9061953015
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
 2024-04-09 09:04:03 -07:00
Maulik Shah
a9cca1a6a5 ARM: dts: msm: Remove CL4 idle state for sun 
Remove CL4 idle state.

Change-Id: I3ded3cc1d2b0acaccb1bd8de65d7353aef2f7d6b
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
 2024-04-08 21:48:27 -07:00
Krzysztof Kozlowski
ca68bf2baf dt-bindings: pinctrl: qcom,x1e80100-tlmm: restrict number of interrupts 
X1E80100 TLMM pin controller comes with only one interrupt, so narrow
the number of interrupts previously defined in common TLMM bindings.

Change-Id: I9779d427cffc339a36fdf6ffcaf9599cc740fd64
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231208215534.195854-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Git-commit: 7e47d9d3750c17bdbbcbeac65f6ca54d633a58b5
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
 2024-04-09 10:01:28 +08:00
Rajendra Nayak
ecae808e0a dt-bindings: pinctrl: qcom: Add X1E80100 pinctrl 
Add device tree binding Documentation details for Qualcomm X1E80100 TLMM
device.

Change-Id: Idd6ea87019bc219eb1ab8edc5e5cfc3b3eecdbd0
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231117093921.31968-2-quic_sibis@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Git-commit: 5180f4fa499eb78f45e2d4ee0883c6483884f4df
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
 2024-04-09 10:01:04 +08:00
qctecmdr
7ff848b6b9 Merge "dt-bindings: Add required bindings for monaco" 2024-04-08 04:44:38 -07:00
Pradnya Dahiwale
42651dd79b dt-bindings: pinctrl: Add documentation for monaco TLMM block 
Add documentation for monaco TLMM block.

Change-Id: I68cf536dff9a4462bcd04be9f97fd0b2b5f77078
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
 2024-04-08 02:06:48 -07:00
qctecmdr
55ae11a6eb Merge "dt-bindings: interconnect: Add interconnect bindings for Parrot" 2024-04-07 23:34:03 -07:00
Yuanfang Zhang
79fa362a29 ARM: dts: msm: add GPIO CTI trigger support on sun 
Add GPIO CTI trigger configuration on sun.

Change-Id: I68b66be1ada16cda36a77f5dc61746ed974afe09
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-04-07 19:08:36 -07:00
qctecmdr
e8fa76b168 Merge "ARM: dts: msm: Add tui_demura heap for sun-vm" 2024-04-07 15:04:00 -07:00
qctecmdr
7ba636b166 Merge "ARM: dts: msm: Mark dispcc clock node as GenPD provider" 2024-04-05 20:02:21 -07:00
qctecmdr
83283bc46b Merge "ARM: dts: msm: Add Sun qfprom compat string" 2024-04-05 11:03:53 -07:00
qctecmdr
f467bc627f Merge "ARM: dts: msm: Update mode id for sun vm" 2024-04-05 11:03:52 -07:00
qctecmdr
aeb391b14e Merge "ARM: dts: msm: Add qcom_cpuss_sleep_stats_v4 device for sun" 2024-04-05 08:33:37 -07:00
Maulik Shah
88c9530986 ARM: dts: msm: Update mode id for sun vm 
VMs use platform coordinated PSCI. Update the mode id accordingly.

Change-Id: I8bb0eb3c4ad6f2f4fbdca7781b51e914bd3151b5
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
 2024-04-05 06:47:34 -07:00
qctecmdr
07d371a6ce Merge "ARM: dts: msm: Add initial support for monaco target" 2024-04-05 02:14:16 -07:00
Minghao Zhang
44e4da3d63 ARM: dts: msm: Add qcom_cpuss_sleep_stats_v4 device for sun 
This change add qcom_cpuss_sleep_stats_v4 device.

Change-Id: Iaf226999b468090d4c5af542713a61144caa552b
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
 2024-04-05 01:26:46 -07:00
Minghao Zhang
5c5fb0afd7 dt-bindings: Update dt-binding for cpuss sleep stats v4 
This change updates dt-bindings for qcom_cpuss_sleep_stats_v4 driver
that lpm count and residency can be read.

Change-Id: Ia5dc8fc905610a61561dfba0e8235a4d9dddcf9c
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
 2024-04-05 01:25:54 -07:00
Mukesh Ojha
70d5c7312d ARM: dts: msm: Add Sun qfprom compat string 
Add the soc-specific compatible string for qfprom to
support keepout regions on Sun SoC.

Change-Id: I676acc8110d05dd7d9d7fef0455b5152f3afc4ac
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
 2024-04-04 22:49:51 -07:00
Mukesh Ojha
8483aae65f bindings: Add Sun qfprom compat string 
Add the soc-specific compatible string for qfprom to
support keepout regions on Sun SoC.

Change-Id: Ia48eeb0dba8464407695a2bca1bccb9ad6eec711
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
 2024-04-04 22:49:26 -07:00
Prudhvi Yarlagadda
f69088c645 Revert "ARM: dts: msm: Add GenPD phy regulator to PCIe node" 
This reverts commit 9ff494b311.

Facing issue where PCIe PHY GDSC is getting turned off when system
suspend is happening. So reverting this change till we find a fix.

Change-Id: I7ea0393f3948a49d8eb012ee548d200f040badd6
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
 2024-04-04 16:56:19 -07:00
Prudhvi Yarlagadda
ae20d53944 Revert "ARM: dts: msm: Mark GCC clock node as GenPD provider" 
This reverts commit c0a6035e47.

Facing issue where PCIe PHY GDSC is getting turned off when system
suspend is happening. So reverting this change till we find a fix.

Change-Id: Ic4bb32c126e0247688d31e276a9a3f29c373b167
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
 2024-04-04 16:56:08 -07:00
qctecmdr
7da5526087 Merge "ARM: dts: msm: Add msm id for Sun Rumi" 2024-04-04 07:35:04 -07:00
Mukesh Ojha
5476d04b68 ARM: dts: msm: Add msm id for Sun Rumi 
Add msm id to avoid build failure for Tuna SoC.

Change-Id: Ie3ff07c0865ae8a2b43225db864eb453134201a6
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
 2024-04-04 03:41:39 -07:00
Naresh Kumar Lingagalla
b23188598c dt-bindings: Add required bindings for monaco 
Add bindings for monaco/monacop/mailbox/remoteproc
on monaco.

Change-Id: Ide227ba8b3772c4a5cc180ba9b7ee1d4831f7b91
Signed-off-by: Naresh Kumar Lingagalla <quic_nlingaga@quicinc.com>
 2024-04-04 01:37:30 -07:00
Chetan C R
8d3e8b959a dt-bindings: interconnect: Add interconnect bindings for Parrot 
Add interconnect device bindings for Parrot SoC. These devices
can be used to describe any RPMH and NoC based interconnect devices.

Change-Id: I6c07467e58283ec88abe054c3e68b6f1af050065
Signed-off-by: Chetan C R <quic_cchinnad@quicinc.com>
 2024-04-03 23:10:42 -07:00