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X1E80100 TLMM pin controller comes with only one interrupt, so narrow the number of interrupts previously defined in common TLMM bindings. Change-Id: I9779d427cffc339a36fdf6ffcaf9599cc740fd64 Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231208215534.195854-7-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Git-commit: 7e47d9d3750c17bdbbcbeac65f6ca54d633a58b5 Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>