Commit Graph

165 Commits

Author SHA1 Message Date
Madhu Pagadoju
d0e28b8499 ARM: dts: msm: Update sun device tree for adsp_sleepmon and cdsprm
Add adsp sleepmon driver device configuration,
add new intents to read dcvs clients information and
documentation under cdsprm device tree.

Change-Id: Icb2b7162544af8dc1d1b255ac99e3be6a4765f6d
Signed-off-by: Madhu Pagadoju <quic_mpagadoj@quicinc.com>
2023-10-26 16:21:27 +05:30
Nurit Lichtenstein
d04fa7ba64 ARM: dts: qcom: Add SPU related nodes to sun dtsi
Needed for SPU pil on sun dtsi.

Remoteproc-spss, spcom and spss_utils are disabled.

Change-Id: I97519bacccee2f7094edbcf32e3fdac29d67ac77
Signed-off-by: Nurit Lichtenstein <quic_nuritl@quicinc.com>
2023-10-26 10:34:56 +03:00
David Collins
ae98f1e70e ARM: dts: qcom: add primary SPMI debug bus for Sun boards
Add an SPMI debug device and associated PMIC child devices for the
primary SPMI interface.  This provides consumers with unrestricted
access to the PMIC registers on pre-production devices.  This helps
to simplify debugging.

Change-Id: I920a3655e0e257ee819c7227e154d27ee43f3250
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
2023-10-25 14:10:07 -07:00
David Collins
f5335c097f ARM: dts: qcom: add PMIC Glink and clients for Sun
Add PMIC Glink devices and their client devices.  The PMIC Glink
device with name PMIC_RTR_ADSP_APPS supports the clients: ucsi,
altmode, and battery_charger.  The PMIC Glink device with name
PMIC_LOGS_ADSP_APPS supports the clients: battery_debug,
pmic_glink_debug, charger_ulog_glink, and glink_adc.

Change-Id: Ib5a15c136c77c8368d4a561f266a1588c4649893
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
2023-10-24 16:49:37 -07:00
qctecmdr
9198301bf4 Merge "ARM: dts: msm: Add QUPv3 and GPI DT nodes on SUN" 2023-10-24 14:04:47 -07:00
Patrick Daly
9b676ba16e ARM: dts: msm: Add mem-offline device for sun
Describe the communication channel used to communicate with the
firmware which supports onlining and offlining of memory.

Keep the device in a disabled state for now until a conflict
between THP and memory-hotplug features can be resolved.

Change-Id: I3d74d9d3d58d379b2a91ee976a72dddfb7a221c6
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2023-10-24 13:14:52 -07:00
Bao D. Nguyen
49c2cf1dbf ARM: dts: qcom: Add ufs support for sun platforms
Add ufs support for mtp/cdp/qrd sun platforms.
Enable ufs's smmu fastmap attribute.
Enable ufs host and device resets.

Change-Id: I7e4194a48c022284308c3debd6e18be40289693b
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
2023-10-23 23:30:35 -07:00
Amir Vajid
95020b5012 ARM: dts: msm: Add bus dcvs nodes for sun
Add nodes to enable qcom dcvs, bwmon and memlat
on sun.

Change-Id: I515aa98f01b29fb51be11db33930f96193d13401
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2023-10-23 21:42:58 -07:00
Amir Vajid
77db4f167c ARM: dts: msm: Add cpucp scmi nodes for sun
Add nodes to enable scmi communication to cpucp on sun.

Change-Id: I574949e32e397047701f836d54115f56414ea023
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2023-10-23 20:18:47 -07:00
qctecmdr
f92aa1d781 Merge "ARM: dts: msm: Add cpu idle-states for sun" 2023-10-23 19:23:18 -07:00
Minghao Zhang
fdc9298cfa ARM: dts: msm: Add sys-pm-violators device for sun
This change adds system low power violators device node.

Change-Id: Ie4b7923c2ef96d6d762275b7241948e120230163
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
2023-10-23 15:49:22 +08:00
Xubin Bai
ad62d3ca63 ARM: dts: msm: Enable clock rpmh device node for Sun
Remove fixed-factor-clock and enable device node for rpmh
clocks under apps_rsc in place of fixed clocks.

Change-Id: I9c4d242882f29f616574e339581722b65f27a74f
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
2023-10-17 23:59:46 -07:00
Chandana Kishori Chiluveru
73c1325edd ARM: dts: msm: Add QUPv3 and GPI DT nodes on SUN
Add QUPv3(I2C, SPI, UART and I3C) and GPI DT nodes on SUN.

Change-Id: I2520da18d152eb0a30a9f735d879422e876d2d6a
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2023-10-17 03:36:45 -07:00
Rashid Zafar
35fe875fef ARM: dts: msm: Add cpu idle-states for sun
Update enable-method to PSCI. Add idle-states node and
update cpu node to include appropriate idle state.

Disabled all idle-states for rumi.

Change-Id: I313d52c60081ef1d568781e33d0f2fed1a1f2de4
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2023-10-13 23:21:50 -07:00
qctecmdr
be9be4327d Merge "ARM: dts: msm: Update system cma pool size for sun" 2023-10-12 22:21:39 -07:00
qctecmdr
e0e504a5cc Merge "ARM: dts: msm: Add PCIe Root port configuration for sun" 2023-10-11 14:58:57 -07:00
qctecmdr
271762225d Merge "ARM: dts: msm: Make gx_clkctl_gx_gdsc depend on gpucc for Sun" 2023-10-11 09:33:38 -07:00
qctecmdr
c163efff9f Merge "ARM: dts: msm: sun: Add remoteproc node" 2023-10-10 10:25:56 -07:00
qctecmdr
bd04b76c85 Merge "ARM: dts: qcom: add SPMI bus controller for Sun" 2023-10-09 15:31:40 -07:00
Patrick Daly
033d8fb6c7 ARM: dts: msm: Update system cma pool size for sun
Add an additional 8Mb for kgsl snapshot.

Change-Id: I442259190b11e39f715f852cf3e688e6b32df8b3
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2023-10-06 11:53:08 -07:00
Gokul krishna Krishnakumar
0cb93bbbaa ARM: dts: msm: sun: Add remoteproc node
Add nodes for remoteprocessors's: ADSP, CDSP, MPSS for sun SoC.

Change-Id: I056a5f17ff176274a7f63a5a0c29f0dc8aa71a81
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2023-10-05 10:36:06 -07:00
Unnathi Chalicheemala
04b52df658 ARM: dts: msm: Fix the base addresses of LLCC banks for Sun SoC
Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.

Change-Id: I1d2b758693f6a71338653fa677dbb833299475c6
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
2023-10-04 09:36:56 -07:00
Melody Olvera
f7ace16966 ARM: dts: msm: Add nodes for minidump for sun
Add minidump nodes for sun SoC.

Change-Id: Iebcd2ceaeefceff7d60448d62ad6a98c4fa2d433
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
2023-10-02 14:29:06 -07:00
Mike Tipton
0823b72d1b ARM: dts: msm: Make gx_clkctl_gx_gdsc depend on gpucc for Sun
The clock required to access this GDSC depends on a clock coming from
GPU_CC, which is enabled by default in gpucc probe. Add a phandle to
gpucc to ensure it probes first and enables the required clock.

Change-Id: I5aae1a6a1a3615cf1a8227b839a721a6af945243
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
2023-10-02 13:58:05 -07:00
qctecmdr
4c5cd691e3 Merge "ARM: dts: qcom: Add device tree entries for QTEE drivers" 2023-09-25 16:21:10 -07:00
David Collins
0d4bfb44d3 ARM: dts: qcom: add SPMI bus controller for Sun
Add spmi-pmic-arb devices for the primary and secondary SPMI buses
found on Sun.  The primary bus operates at 19.2 MHz and is used for
most of the PMICs.

The secondary bus operates at 4.8 MHz and is used exclusively for
charging PMICs.  Note that the secondary bus is not connected to
the SoC on the board due to voltage level differences.  Therefore,
keep the secondary bus device disabled.

Change-Id: I6b2bb6b54e285fd9c333971b08134c3768087869
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
2023-09-25 13:47:53 -07:00
Meena Pasumarthi
ba5f42abbc ARM: dts: msm: Add base TUIVM and OEMVM for Sun
Add base TUIVM and OEMVM device tree support for Sun RUMI platform.

Change-Id: I32598ce2c3488658e2c9caf0cd7a2368665c0b06
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
2023-09-25 09:50:18 +05:30
Anmolpreet Kaur
ffce3361b2 ARM: dts: qcom: Add device tree entries for QTEE drivers
Add device tree entries for smcinvoke, shmbridge and tz-log
drivers and qseecom heaps.

Change-Id: I1a427c66e12a02532097db352a1d26fe5ececb9f
Signed-off-by: Anmolpreet Kaur <quic_anmolpre@quicinc.com>
2023-09-23 21:26:44 -07:00
Lazarus Motha
6e6d4bacc1 ARM: dts: msm: Add PCIe Root port configuration for sun
Add initial devicetree nodes and entries to support
PCIe RC0 port configuration on sun.

Change-Id: I3b7419bfd376a51388785cc4e2f9702ddaabe397
Signed-off-by: Lazarus Motha <quic_lmotha@quicinc.com>
2023-09-22 14:21:32 -07:00
qctecmdr
c3ebfa0666 Merge "ARM: dts: msm: add coresight component DT file for sun" 2023-09-22 13:30:55 -07:00
qctecmdr
46ceb889f4 Merge "ARM: dts: qcom: Add TSENS device for sun" 2023-09-22 10:10:39 -07:00
Yuanfang Zhang
2964e2edd2 ARM: dts: msm: add coresight component DT file for sun
Add coresight component devicetree file for sun.

Change-Id: I28b8b6a2142fc89ed457553f039eca785064007b
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
2023-09-19 23:21:39 -07:00
qctecmdr
9ffd7a80ef Merge "ARM: dts: qcom: Adding msm_sharedmem DT entry" 2023-09-15 14:41:22 -07:00
qctecmdr
11ec13ccb4 Merge "ARM: dts: msm: Add GCC phandle to GDSC driver for Sun" 2023-09-14 14:43:45 -07:00
Rashid Zafar
2d5aaa7b2b ARM: dts: qcom: Add TSENS device for sun
Add TSENS device and respective TSENS thermal zone configuration for
sun.

Change-Id: I41d2d44d7898c60fc600d34306ef5e107e3fe15c
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
2023-09-13 12:11:22 -07:00
Vivek Aknurwar
3ad392617c ARM: dts: msm: Add GCC phandle to GDSC driver for Sun
GCC needs to probe before GDSC regulator driver as driver will be
unable to read registers without required gcc config ahb clocks. These
config ahb clocks are enabled in GCC probe. Thus GCC needs to probe
before GDSC driver. Adding GCC phandles to sequence the probe order
during kernel boot.

Change-Id: Icd13d18f07540f96cb4175edc5bd41526b6a3841
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
2023-09-12 13:46:16 -07:00
Marc Guillaume
d678c24cfe ARM: dts: qcom: Adding msm_sharedmem DT entry
Port of the DT entry which provides configuration settings for the
msm_sharedmem driver. This is needed for correct operation of
MPSS RFS/EFS.

Change-Id: Ic08e19398f10908920f8ac1d7e4670109de5e356
Signed-off-by: Marc Guillaume <quic_mguillau@quicinc.com>
2023-09-11 16:54:32 -07:00
Eric Rosas
f66ad61238 dt-bindings: Add aliases label
Audio kernel depends on the aliases label being defined
from the top level. Add label to aliases node to allow
for proper compilation of audio kernel.

Change-Id: Idb88dd470ca0dec31670adef8546e34fee14a4d7
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-09-08 14:24:12 -07:00
qctecmdr
10e42d9078 Merge "ARM: dts: msm: Define adsp_mem_heap region" 2023-09-07 08:17:19 -07:00
qctecmdr
86bdd50b20 Merge "ARM: dts: msm: Add smp2p for sun" 2023-09-06 17:54:55 -07:00
qctecmdr
51d6612124 Merge "ARM: dts: msm: Unstub Videocc for Sun" 2023-09-06 16:31:04 -07:00
qctecmdr
21f9c92153 Merge "ARM: dts: msm: Unstub Cambistmclkcc on Sun" 2023-09-06 16:31:04 -07:00
qctecmdr
53b2837ffd Merge "ARM: dts: msm: Unstub tcsrcc for Sun" 2023-09-06 16:31:04 -07:00
qctecmdr
682b8230cf Merge "ARM: dts: msm: sun: Add EUD node for sun SoC" 2023-09-06 16:31:03 -07:00
qctecmdr
2d890362b9 Merge "ARM: dts: msm: Add bi_tcxo_ao phandle for CCs on Sun" 2023-09-06 14:54:56 -07:00
Anirudh Raghavendra
ad2a8bc603 ARM: dts: msm: Define adsp_mem_heap region
Define adsp mem heap region for adsp-mem device. Also
add documentation for the same.

Change-Id: Icce88b87c28797ff51ba5b0d885706d3a903eee3
Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com>
2023-09-05 10:56:16 -07:00
qctecmdr
6fd4d30426 Merge "ARM: dts: msm: Unstub gpucc for Sun" 2023-09-01 03:09:39 -07:00
Xubin Bai
92f3bdac38 ARM: dts: msm: Add bi_tcxo_ao phandle for CCs on Sun
Add bi_tcxo_ao phandle for camcc, dispcc and evacc on Sun.

Change-Id: Ibece684c5010c9b32ec92228f4c2e9811e69e323
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
2023-08-31 04:02:04 -07:00
Xubin Bai
9700e0ffe9 ARM: dts: msm: Unstub tcsrcc for Sun
Unstub tcsrcc for Sun. Also shrink the tlmm
region to avoid overlaps, but that tlmm doesn't
use anything past where we're shrinking it.

Change-Id: Id9f09105ad959ba9c9f44b2cb3912e1f93bba3b3
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
2023-08-23 21:33:50 -07:00
Chris Lew
830e4d7eb4 ARM: dts: msm: Add smp2p for sun
Add the smp2p nodes for lpaidsp, modem, cdsp and soccp for sun.

Change-Id: I9664b57fbb8f39e5edbadfad66882d97fe1634d3
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
2023-08-22 17:22:58 -07:00