Sai Harshini Nimmala 3cf966f8c0 ARM: dts: msm: Add a node for gclk cycle counter driver ...

Add gclk cycle counter register information to devicetree in a
separate node for use by associated driver.

Change-Id: Ie27724dc04703d496a652729d61e03e0f4ff0115
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>

2023-11-12 10:22:45 -08:00

bindings

Merge "dt-bindings: platform: msm: Add Q2SPI msm geni bindings for Sun"

2023-11-09 07:43:35 -08:00

qcom

ARM: dts: msm: Add a node for gclk cycle counter driver

2023-11-12 10:22:45 -08:00

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

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