Add glink channel documentation used for communication between
monaco and slate.
Change-Id: Ie092dfb7da3402a2b821c9cbe0bfa35d2d7af309
Signed-off-by: Akshay Gola <quic_agola@quicinc.com>
This commit adds a device tree binding documentation for the
AoN subsystem.
The documentation includes details about the properties, usage
and examples of the binding.
Change-Id: Ic4d4ec8d0ea1fc9b83cc0369fc0df06f6631f329
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
Enable USB related properties for USB functionality
on kera.
Change-Id: Iceb1d404dd7b4f500885064ee0e65cc8a0dc7d7c
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Remove unwanted config value for the gpio.
Change-Id: Id05eda44034b278cc7e3227a8154876026dedc2b
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
Add DT entry to enable the memory onject support for si-core.
Change-Id: I877fe2e6c9d5f71a2b055428ad942455470b6f9e
Signed-off-by: Amirreza Zarrabi <quic_azarrabi@quicinc.com>
The downstream pmic_glink driver and compatible string has been
renamed to qti_pmic_glink on the qcom-6.6 kernel branch, to avoid
conflict with the independent upstream driver.
This was handled for the "PMIC_RTR_ADSP_APPS" channel clients
(UCSI, Altmode and Battery charger), but got missed for the
"PMIC_LOGS_ADSP_APPS" channel clients (battery-debug, charger-ulog
and spmi-glink-debug). Fix it.
Change-Id: I441aecde368fab411d6df3ae0d8c04b9c3a002f2
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
This commit adds the device tree binding documentation for the
GLINK SLATECOM transport(glink_slatecom_xprt).
The documentation includes details about the properties, usage
and examples of the binding.
Change-Id: I12770ac197e1b62ebacf9c0e3445b559b5c1abcf
Signed-off-by: Sudeepgoud Patil <quic_sudeepgo@quicinc.com>
Add properties like premature count, sample invalid time and whether
to use bias timer for cluster device.
Change-Id: I487e420ce422766b18d6c86632c521215b0ed484
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
For backward compatibility for parrot target, add
qcom,force-low-pwm-size property to limit setting PWM sizes to
6 and 9 bit modes only, rather than using the full 8 to 15 bit
PWM sizes range.
Change-Id: Iff15fe61977ad34eed4c0dd75de3f233c08fd681
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
Add qcom,force-low-pwm-size property that would indicate the
forced use of legacy low PWM sizes (6 or 9 bits) instead of
full 8-15 bit PWM sizes.
Change-Id: Ic0e2b972bc16871891d81ec20ec0b48d326f6666
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
Add device tree snapshot for AON from msm-5.15.c2.
Snapshot is taken from msm-5.15.c2 kernel commit 95ffcf910eee
("ARM: dts: msm: add aon-rma glink node").
Change-Id: I7f6a2a1c2f5fd04b97f16f5dbace4ce87e88f0b7
Signed-off-by: Koushik Immadisetty <quic_kimmadis@quicinc.com>
Add qcom,sw-cmd-freq-detect property to support software command based
2-step LRA resonant frequency detection method.
Change-Id: I04ebe79c5f93498bc437605dac8d284e71dad414
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
Enable the interconnect devices for cnoc, snoc, bimc, clk_virt,
mmnrt_virt and mmrt_virt.
This will allow consumers to get their path and set bandwidth
constraints on them.
Change-Id: Iefa87748870578a5472ed08e3692d04a7a81337c
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
CPUCP exposes certain clocks over SCMI. Enable the clock protocol to
handle these.
Change-Id: Idfc040e852cb19adae8340f6ceda7f95f52ccb1c
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
SPM feature is deprecated from 5.15 kernel. So remove
events specific to SPM feature for Ravelin.
Change-Id: Idbcbbd6f3736ad19cb1b0ea479809548a020195d
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add nodes to enable scmi communication to cpucp on ravelin.
Update tx and rx regname for cpucp.
Change-Id: I9674a974e58d8be1eb02063846f5e9e0d1b046c6
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Probe of mem-buf device fails unless this property is present.
Fixes: c811ad67a6 ("ARM: dts: msm: Add support for mem-buf-msgq between oemvm and pvm")
Change-Id: I8ec7302fb79f554edf20e55b2d15ae61486f6d0c
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
This change adds the compatible string for rpm-smd and mpm
device nodes so that rpm-smd and mpm drivers will probe
during device boot up.
Change-Id: I8816a9e3dd8c9cef39440a1bf912d6d5f06f9f59
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
Add CPUs for each CQ in qcom,esi-affinity-mask.
Change-Id: I78dd9b6ffa28aceaeb5feeaec543172c672bb986
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
