Pradnya Dahiwale 58daad1f6c ARM: dts: msm: dt snabpshot for Monaco SoC ...

Add dt snapshot of cpu level cache from branch msm-5.15.c2
commit 8ae5ffe89e0f ("ARM: dts: msm: Add mdsp heap for mDSP compute").

Change-Id: Id833a1f0894f29753c0ce08839bf3111b8d57a61
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>

2024-06-15 19:10:51 +05:30

bindings

Merge "dt-bindings: clock: Add clock controller bindings for Monaco"

2024-06-06 12:23:19 -07:00

qcom

ARM: dts: msm: dt snabpshot for Monaco SoC

2024-06-15 19:10:51 +05:30

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

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