Add a description for the "qcom,mid" property which corresponds
to the SPMI master ID of the SPMI PMIC arbiter controller. It is
most useful in systems with multiple masters, e.g. when there are
multiple SoCs connected to a single SPMI bus.
Change-Id: I376e6f569f9bbea44ba3930480a330fb1dd2c2de
Signed-off-by: Ayyagari Ushasreevalli <quic_aushasre@quicinc.com>
Spilt memdump entries to static and dynamic dumps. Static dumps
are enabled by default. Dynamic mem dumps are enabled/disabled
using sysfs nodes and it's disabled in perf build.
Change-Id: I0d0e7fa1602626f59ec1eed2d2337a88a3d76730
Signed-off-by: Jigyanshu Mani <quic_jmani@quicinc.com>
Add support for CPUSYS_VM for Kera target.
Change-Id: I7c8f0656ff69cc4f117b8a1c17baa86fd6ec8eb5
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
This change removes duplicate cmd_db mapping, since it
is mapped twice in reserved-memory section.
Change-Id: Ied3b2c6a572ff9fac61c2c50bf9eb781ccf37626
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
The "capacity-dmips-mhz" and "dynamic-power-coefficient" are
used to build Energy Model which in turn is used by EAS to take
placement decisions.
Change-Id: Iac04bf0b435d6741fd6b5ae10c4cc38675ac5170
Signed-off-by: Ankit Sharma <quic_anshar@quicinc.com>
Add support for debug clock controller nodes on Tuna platform.
While at it add stubs clock support nodes for gxclkctl.
Change-Id: I80e490feaaf9577a099990bda57fe660e8009222
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Add support for display clock controller and move correspondin gdsc's
from dummy to real on Tuna platform.
Change-Id: I3949ba5bc798d5a62d891c151115bd616004a466
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add list of GPIOs reserved for QUP 2 SE 6(20,21,22,23),
CXM UART1(111,112) and CXM UART2(110,116).
Change-Id: If501f5da5f732c5270438066525389001d345321
Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Update root and init mount points for parrot.
Change-Id: I942794c6bcb929cd0d6c2f784341fcbba694e9a9
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add list of GPIOs reserved for CXM UART1(82,83), CXM UART2(111,112)
and QUP 1 SE 1(4,5,6,7).
Change-Id: I06ad98537aa01ab812a9cd311ec3156074af7247
Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Add compatible strings to PON, PWM-LPG, VIBRATOR, FLASH-V2 and
PMI632 gpio DT nodes for Ravelin. These were removed from the
bulk DT porting for Ravelin on qcom-6.6 device-tree branch.
Change-Id: I5e9d6a98fe537b805174b520239f12bfbf676a52
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
Update DCC transaction timeout value to 0x80.
Change-Id: I11271d05416b49f8c7c9055de71273c4d36bc3f9
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
The cam_cc_titan_top_gdsc causes camera to permanently assert qactive
when it's enabled. If MMNOC attempts to collapse when the GDSC is
enabled, then the qactive signal will cause BCM to get stuck in the
collapse sequence. This will eventually lead to rpmh driver timeouts
when requested for MMNOC. Fix this by explicitly voting for MMNOC on
behalf of the GDSC.
Change-Id: I6e75a8da8867a64389fec07ad8ca506b6ac3e860
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
