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Merge "ARM: dts: msm: Add support for display clock controller on TUNA"

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QCTECMDR Service
2024-09-22 22:36:48 -07:00
committed by Gerrit - the friendly Code Review server
parent deb909a647 fb5ce2b78a
commit 02a679524e
1 changed files with 23 additions and 4 deletions
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27
qcom/tuna.dtsi
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@@ -1130,9 +1130,26 @@
#reset-cells = <1>;
};
dispcc_crm: syscon@af27800 {
compatible = "syscon";
reg = <0xaf27800 0x2000>;
};
dispcc: clock-controller@af00000 {
compatible = "qcom,dummycc";
clock-output-names = "dispcc_clocks";
compatible = "qcom,tuna-dispcc", "syscon";
reg = <0xaf00000 0x20000>;
reg-name = "cc_base";
vdd_mm-supply = <&VDD_MM_LEVEL>;
vdd_mx-supply = <&VDD_MX_LEVEL>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>,
<&gcc GCC_DISP_AHB_CLK>;
clock-names = "bi_tcxo",
"bi_tcxo_ao",
"sleep_clk",
"iface";
qcom,dispcc_crm-crmc = <&dispcc_crm>;
#clock-cells = <1>;
#reset-cells = <1>;
};
@@ -1746,12 +1763,14 @@
};
&disp_cc_mdss_core_gdsc {
compatible = "regulator-fixed";
clocks = <&gcc GCC_DISP_AHB_CLK>;
parent-supply = <&VDD_MM_LEVEL>;
status = "ok";
};
&disp_cc_mdss_core_int2_gdsc {
compatible = "regulator-fixed";
clocks = <&gcc GCC_DISP_AHB_CLK>;
parent-supply = <&VDD_MM_LEVEL>;
status = "ok";
};