Add nodes to enable scmi communication to cpucp on sun.
Change-Id: I574949e32e397047701f836d54115f56414ea023
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Remove fixed-factor-clock and enable device node for rpmh
clocks under apps_rsc in place of fixed clocks.
Change-Id: I9c4d242882f29f616574e339581722b65f27a74f
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Update enable-method to PSCI. Add idle-states node and
update cpu node to include appropriate idle state.
Disabled all idle-states for rumi.
Change-Id: I313d52c60081ef1d568781e33d0f2fed1a1f2de4
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.
Change-Id: I1d2b758693f6a71338653fa677dbb833299475c6
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
The clock required to access this GDSC depends on a clock coming from
GPU_CC, which is enabled by default in gpucc probe. Add a phandle to
gpucc to ensure it probes first and enables the required clock.
Change-Id: I5aae1a6a1a3615cf1a8227b839a721a6af945243
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add spmi-pmic-arb devices for the primary and secondary SPMI buses
found on Sun. The primary bus operates at 19.2 MHz and is used for
most of the PMICs.
The secondary bus operates at 4.8 MHz and is used exclusively for
charging PMICs. Note that the secondary bus is not connected to
the SoC on the board due to voltage level differences. Therefore,
keep the secondary bus device disabled.
Change-Id: I6b2bb6b54e285fd9c333971b08134c3768087869
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add base TUIVM and OEMVM device tree support for Sun RUMI platform.
Change-Id: I32598ce2c3488658e2c9caf0cd7a2368665c0b06
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
Add device tree entries for smcinvoke, shmbridge and tz-log
drivers and qseecom heaps.
Change-Id: I1a427c66e12a02532097db352a1d26fe5ececb9f
Signed-off-by: Anmolpreet Kaur <quic_anmolpre@quicinc.com>
Add initial devicetree nodes and entries to support
PCIe RC0 port configuration on sun.
Change-Id: I3b7419bfd376a51388785cc4e2f9702ddaabe397
Signed-off-by: Lazarus Motha <quic_lmotha@quicinc.com>
GCC needs to probe before GDSC regulator driver as driver will be
unable to read registers without required gcc config ahb clocks. These
config ahb clocks are enabled in GCC probe. Thus GCC needs to probe
before GDSC driver. Adding GCC phandles to sequence the probe order
during kernel boot.
Change-Id: Icd13d18f07540f96cb4175edc5bd41526b6a3841
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
Port of the DT entry which provides configuration settings for the
msm_sharedmem driver. This is needed for correct operation of
MPSS RFS/EFS.
Change-Id: Ic08e19398f10908920f8ac1d7e4670109de5e356
Signed-off-by: Marc Guillaume <quic_mguillau@quicinc.com>
Audio kernel depends on the aliases label being defined
from the top level. Add label to aliases node to allow
for proper compilation of audio kernel.
Change-Id: Idb88dd470ca0dec31670adef8546e34fee14a4d7
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
Define adsp mem heap region for adsp-mem device. Also
add documentation for the same.
Change-Id: Icce88b87c28797ff51ba5b0d885706d3a903eee3
Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com>
Add bi_tcxo_ao phandle for camcc, dispcc and evacc on Sun.
Change-Id: Ibece684c5010c9b32ec92228f4c2e9811e69e323
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Unstub tcsrcc for Sun. Also shrink the tlmm
region to avoid overlaps, but that tlmm doesn't
use anything past where we're shrinking it.
Change-Id: Id9f09105ad959ba9c9f44b2cb3912e1f93bba3b3
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Add the smp2p nodes for lpaidsp, modem, cdsp and soccp for sun.
Change-Id: I9664b57fbb8f39e5edbadfad66882d97fe1634d3
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
Add the nodes to describe the QMP devices to communicate with AOSS and
TME.
Change-Id: Iaac6b401e3554ce696a9faf5abaeb16717ff0907
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
Add PDC interrupt controller to support wake irqs.
Change-Id: I459a68079611f7ed08977b2296b7d4377eb649ee
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
