Add an SPMI debug device and associated PMIC child devices for the
primary SPMI interface. This provides consumers with unrestricted
access to the PMIC registers on pre-production devices. This helps
to simplify debugging.
Change-Id: I920a3655e0e257ee819c7227e154d27ee43f3250
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add SMB and IDT charger PMIC devices inside of the pmic-glink-debug
device. These are interfaced over I2C and an SPMI bridge bus. This
ensures that software is able to access the registers of these PMICs.
Change-Id: I7afc56cb78a353960cb7db98ce5d9b51a05db9fe
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add PMIC Glink ADC channel nodes for Sun MTP and QRD boards.
This exposes an interface for software to read PMIC charger ADC
channels for input current, charge current, and die temperature.
This is useful for PMICs connected via I2C which are only
accessible to charger firmware.
Change-Id: Ie8a9a0690b9937f9c0c541123c28e544ba3495ec
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add PMIC Glink devices and their client devices. The PMIC Glink
device with name PMIC_RTR_ADSP_APPS supports the clients: ucsi,
altmode, and battery_charger. The PMIC Glink device with name
PMIC_LOGS_ADSP_APPS supports the clients: battery_debug,
pmic_glink_debug, charger_ulog_glink, and glink_adc.
Change-Id: Ib5a15c136c77c8368d4a561f266a1588c4649893
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add nodes to enable scmi communication to cpucp on sun.
Change-Id: I574949e32e397047701f836d54115f56414ea023
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Add initial device trees to support Sun QRD sku1 and sku2 SoC
and it's platforms.
Change-Id: Ibf28cbc9f33f19908c4d8ac1b431d17632c43e6b
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Remove fixed-factor-clock and enable device node for rpmh
clocks under apps_rsc in place of fixed clocks.
Change-Id: I9c4d242882f29f616574e339581722b65f27a74f
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Add RPMH_CXO_CLK as ref_clk to UFS for Sun on pre-sil.
On Rumi ref_clk is to UFS PHY is 19.2MHz and actual device
it is 38.4MHz.
Also update correct gcc header file for sun.
Change-Id: I78ed60095e5229405e7962f4676bfab7b7556676
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
Describe the properties of the memory region virtio-mem supports.
Change-Id: Ifdc420d25c4fcf1acc93ccd82a80c89857b3c427
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Describe the message queues and capabilities of the mem-buf device.
Change-Id: I9ff137c3cfee8d5f9e56930bf8ca9a81066e0150
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add DT bindings for SPI which provides the resource management details
for the SPI geni msm driver.
Change-Id: Ifcaccf747ee2efe41fba6d77660456916dcc099b
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
Add device_type property for the pcie devicetree nodes
in sun.
This is needed to make sure that the pcie devicetree node
is associated with the pci bus when ranges property gets
parsed by the of/address.c driver.
And this change is mandatory for pci devicetree nodes with
the introduction of the following change in of/address.c
upstream commit <3d5089c4263d> "of/address: Add support
for 3 address cell bus".
Without this change, BAR address allocation failure will
happen as error logs below as the flags cell in ranges
property in devicetree will be read wrong.
pci-msm 1c00000.qcom,pcie:err 0x0060200000..0x00602fffff -> 0x0060200000.
pci-msm 1c00000.qcom,pcie:err 0x0060300000..0x0063ffffff -> 0x0060300000.
pci-msm 1c00000.qcom,pcie: non-prefetchable memory resource required.
pci 0000:00:00.0: BAR 0: no space for [mem size 0x00001000 64bit].
pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x00001000 64bit].
Change-Id: I8b1591ea83784ffc19c928e1af73117657ac7f15
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Add device_type property for the pcie devicetree nodes
in pineapple.
This is needed to make sure that the pcie devicetree node
is associated with the pci bus when ranges property gets
parsed by the of/address.c driver.
And this change is mandatory for pci devicetree nodes with
the introduction of the following change in of/address.c
upstream commit <3d5089c4263d> "of/address: Add support
for 3 address cell bus".
Without this change, BAR address allocation failure will
happen as error logs below as the flags cell in ranges
property in devicetree will be read wrong.
pci-msm 1c00000.qcom,pcie:err 0x0060200000..0x00602fffff -> 0x0060200000.
pci-msm 1c00000.qcom,pcie:err 0x0060300000..0x0063ffffff -> 0x0060300000.
pci-msm 1c00000.qcom,pcie: non-prefetchable memory resource required.
pci 0000:00:00.0: BAR 0: no space for [mem size 0x00001000 64bit].
pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x00001000 64bit].
Change-Id: I212e023880ed8373eb17379754da84b6947d1171
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Add ON Semiconductor USB Type-C and display port 10Gbps Linear Re-Driver
bindings used on MSM platforms.
Change-Id: Ia333a63a958a5a890f2743a3ec6dc51d7053b720
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
Add DT bindings for I2C which provides the resource management details
for the I2C geni msm driver.
Change-Id: I2bc39bf86e0760db595cd2a17e7c1fc6ee1f98cf
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
Update enable-method to PSCI. Add idle-states node and
update cpu node to include appropriate idle state.
Disabled all idle-states for rumi.
Change-Id: I313d52c60081ef1d568781e33d0f2fed1a1f2de4
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Add a regulator over-current (OCP) notifier device along with
supply properties to map from PMIC peripherals to specific
regulator devices. This provides a mechanism to notify
consumers of a particular regulator when OCP occurs.
Change-Id: I17ee6af65492ece062722c41f97f3ea052970a25
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add a fixed regulator device for the DBO3 buck-boost regulator.
It is enabled via PM8550 GPIO 9 and outputs 3.6 V.
Change-Id: Iff6e0e1cceed6ad369fb67aca3926f5a808cf3e6
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add a PMIC PON log parser device which reads the log stored in
PMK8550 SDAM5 and SDAM6.
Change-Id: I944df2186b27ebb42cf2d4dc8f51dbf7b40cea9b
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
With the recent kernel upgrade to 6.4, swiotlb_init() path is taken
because of the new kernel config CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC,
which is enabled by default. But this should not done for trusted VMs
supported on Sun and Pineapple VMs, as these VMs would be using carveout
swiotlb memory set up separately by virtio mmio driver through the
feature CONFIG_SWIOTLB_NONLINEAR. Hence, add swiotlb=noforce kernel
command line to disable generic swiotlb setup/init for VMs. Without
this option set, VM boot up failure is observed.
Change-Id: Ia35cd9a2f95f41b0b0daa6cf75799fd4432a95bd
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
