The clock required to access this GDSC depends on a clock coming from
GPU_CC, which is enabled by default in gpucc probe. Add a phandle to
gpucc to ensure it probes first and enables the required clock.
Change-Id: I5aae1a6a1a3615cf1a8227b839a721a6af945243
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Correct the following pcie dt property names on pineapple
device as they are modified for this latest kernel devicetree
documentation.
qcom,pcie-clkreq-gpio -> qcom,pcie-clkreq-pin.
clock-frequency -> qcom,pcie-clock-frequency.
Change-Id: I79454ef04a69d5427e32c45042304809cdcb886c
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Enable tlmm VM mem access device tree nodes for Pineapple.
Change-Id: I2bfbc22e8f9e933e3d0ec419b3fa67ff89b4fdad
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Sun and pineapple share certain PMICs. Prepare the shared PMIC devices
to be used for both Sun and Pineapple.
Change-Id: I378e781751b4ee42b3c0d4940dff30ffbd2b3e5a
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Update the Qualcomm Technologies, INC. PMIC GPIO binding documentation
to include compatible strings for PMIH010x and PMD802x PMICs.
Change-Id: Icf07b2f657d0e6fd104ae36553d1631caadcdb70
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Add clock handles to CPU nodes to enable frequency domains for cpus.
Change-Id: I77dc5dbedbe7704d392c58913647beaa36571872
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
Update prescale ratios to support the new channels.
Change-Id: I4d37e9653962954e856f464df32297d9aa90757a
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
[quic_amelende@quicinc.com: Converted binding change from .txt to .yaml]
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Update compatible string to support ADC channels that are registered to
thermal framework, without registering interrupts.
Change-Id: Ie2a1d59272434453c27f2daa2b758ab8a6c96db2
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Add device tree files needed to support Sun SoC + Kiwi platforms.
Change-Id: Ie27eea504087f8da315ab6b0e90d1660d32e3815
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add spmi-pmic-arb devices for the primary and secondary SPMI buses
found on Sun. The primary bus operates at 19.2 MHz and is used for
most of the PMICs.
The secondary bus operates at 4.8 MHz and is used exclusively for
charging PMICs. Note that the secondary bus is not connected to
the SoC on the board due to voltage level differences. Therefore,
keep the secondary bus device disabled.
Change-Id: I6b2bb6b54e285fd9c333971b08134c3768087869
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add base TUIVM and OEMVM device tree support for Sun RUMI platform.
Change-Id: I32598ce2c3488658e2c9caf0cd7a2368665c0b06
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
Add base TUIVM and OEMVM device tree support for all Pineapple platforms.
Change-Id: I7c3cc2112e122f25a2f0b573128e8fdfb86975c5
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Adding bindings to support vm on Sun.
This is snapshot of bindings from 'commit 999a92cd8b38
("Merge "ARM: dts: qcom: Add platform support for VMs on
Cliffs"")' from device tree project msm-6.1 branch.
Change-Id: I47eda741b3451d38d215f7d95505a2bb4dd86565
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
Add device tree entries for smcinvoke, shmbridge and tz-log
drivers and qseecom heaps.
Change-Id: I1a427c66e12a02532097db352a1d26fe5ececb9f
Signed-off-by: Anmolpreet Kaur <quic_anmolpre@quicinc.com>
Add initial devicetree nodes and entries to support
PCIe RC0 port configuration on sun.
Change-Id: I3b7419bfd376a51388785cc4e2f9702ddaabe397
Signed-off-by: Lazarus Motha <quic_lmotha@quicinc.com>
Add compatibile string for Pineapple and Sun variants.
Change-Id: I13a53075c5fef1ed6dd2d1c9e59b792b73b08057
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Add crmb and crmc register space for cesta devices on pineapple.
Change-Id: Ia8ec195ca1683e652b31a5daa2ab271e8bcec321
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Add compatibles for pineapple and Sun pas.
Change-Id: I55b11ba6dd1140d225ff55d708867b60a5b9354c
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Since we use downstream pmic_glink drivers, use the right compatible
string for pmic_glink devices on pineapple to support battery
management.
Change-Id: Ia6375ec2c938149dd31ae073b906b1c09b37b21e
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
Add bindings for thermal devices on Sun Soc, converted to YAML
format.
Change-Id: Ie5c39b55055c8f4e2a581128afdc45399cfb0c31
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
