Add device_type property for the pcie devicetree nodes
in pineapple.
This is needed to make sure that the pcie devicetree node
is associated with the pci bus when ranges property gets
parsed by the of/address.c driver.
And this change is mandatory for pci devicetree nodes with
the introduction of the following change in of/address.c
upstream commit <3d5089c4263d> "of/address: Add support
for 3 address cell bus".
Without this change, BAR address allocation failure will
happen as error logs below as the flags cell in ranges
property in devicetree will be read wrong.
pci-msm 1c00000.qcom,pcie:err 0x0060200000..0x00602fffff -> 0x0060200000.
pci-msm 1c00000.qcom,pcie:err 0x0060300000..0x0063ffffff -> 0x0060300000.
pci-msm 1c00000.qcom,pcie: non-prefetchable memory resource required.
pci 0000:00:00.0: BAR 0: no space for [mem size 0x00001000 64bit].
pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x00001000 64bit].
Change-Id: I212e023880ed8373eb17379754da84b6947d1171
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Add ON Semiconductor USB Type-C and display port 10Gbps Linear Re-Driver
bindings used on MSM platforms.
Change-Id: Ia333a63a958a5a890f2743a3ec6dc51d7053b720
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
Add DT bindings for I2C which provides the resource management details
for the I2C geni msm driver.
Change-Id: I2bc39bf86e0760db595cd2a17e7c1fc6ee1f98cf
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
This snapshot is taken from qcom-6.1 commit 5e1de6591957
("dt-bindings: IMEM: add binding for Modem DSM region").
Change-Id: Ie0af47ef3d0957ae3537a3b97912eaa85275bd86
Signed-off-by: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com>
Update enable-method to PSCI. Add idle-states node and
update cpu node to include appropriate idle state.
Disabled all idle-states for rumi.
Change-Id: I313d52c60081ef1d568781e33d0f2fed1a1f2de4
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Add a regulator over-current (OCP) notifier device along with
supply properties to map from PMIC peripherals to specific
regulator devices. This provides a mechanism to notify
consumers of a particular regulator when OCP occurs.
Change-Id: I17ee6af65492ece062722c41f97f3ea052970a25
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add a fixed regulator device for the DBO3 buck-boost regulator.
It is enabled via PM8550 GPIO 9 and outputs 3.6 V.
Change-Id: Iff6e0e1cceed6ad369fb67aca3926f5a808cf3e6
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add a PMIC PON log parser device which reads the log stored in
PMK8550 SDAM5 and SDAM6.
Change-Id: I944df2186b27ebb42cf2d4dc8f51dbf7b40cea9b
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
With the recent kernel upgrade to 6.4, swiotlb_init() path is taken
because of the new kernel config CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC,
which is enabled by default. But this should not done for trusted VMs
supported on Sun and Pineapple VMs, as these VMs would be using carveout
swiotlb memory set up separately by virtio mmio driver through the
feature CONFIG_SWIOTLB_NONLINEAR. Hence, add swiotlb=noforce kernel
command line to disable generic swiotlb setup/init for VMs. Without
this option set, VM boot up failure is observed.
Change-Id: Ia35cd9a2f95f41b0b0daa6cf75799fd4432a95bd
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
Add bindings for SW-calibrated ADC used on PMR735A/PMR735B on
targets which don't have PMK8350 running in master mode.
Change-Id: I753b3caf1e52ac9920a9df32cbef465277409700
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
[quic_amelende@quicinc.com: Converted binding change from .txt to .yaml]
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
There were 2 entries for spss, remove one.
Change-Id: Ia7aae336809953377f9a9da6457289262fb2524a
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Add documentation for ufs-phy-qmp-v4-sun phy driver.
Change-Id: I5238ad385f7833e9de3a4c85a9a2936d3dc6a8f4
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Adding the firmware name and updating the additional memory assign node
for remoteproc's to be compatible with the driver.
Change-Id: I3787fd0c97c039821a91e15bc6e554caccf071a8
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
The driver provides the framework to test memory lend to VM.
Change-Id: I90c2b17181ce9e50c037fa4997f8f9a5f6b9154b
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add qcom-spmi-temp-alarm devices for the TEMP_ALARM and TEMP_ALARM_LITE
PMIC peripherals found in PMICs PM8550VE_D, PM8550VE_G, PM8550VS_F,
PM8550VS_J, PMIH010X, and PMD802X which are used on Sun boards. Each
TEMP_ALARM device can monitor the die temperature of a particular PMIC.
Change-Id: I3e29ec91f50a5c27d4a8e581c9c17ad3ae09d187
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Specify a pinctrl configuration for PMK8550 GPIO 3 to enable
alt_sleep_clk output so that clients like WLAN and BT can
function properly.
Change-Id: I74506946647b55e391a8c848c44ccf20af966739
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
Bindings for fastrpc nodes and the child nodes.
Change-Id: Ic967b92d2324d5f9671614f62973c5f9820d6b4b
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Correct the following pcie1 dt property names on pineapple
device as they are modified for this latest kernel devicetree
documentation.
clock-frequency -> qcom,pcie-clock-frequency.
Change-Id: I048275f388f31fe71b157f1f9ab4aaf5eec6131b
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Update qcom,spmi-vadc bindings to include "qcom,scale-fn-type"
property for ADC7.
Change-Id: Ieb8ad5779b078dd77838c498b3a4e0bbcf907df8
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
[quic_amelende@quicinc.com: Converted binding change from .txt to .yaml
and removed changes already captured in yaml]
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Following device tree register addresses change from upstream commit
ee13b50 ("qcom: llcc/edac: Fix the base address used for accessing LLCC
banks").
Change LLCC bindings for Pineapple and Sun SoC.
Change-Id: I60bdfd7e4bc19343a3eb6a1c0c597523f1c30963
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.
Change-Id: I1d2b758693f6a71338653fa677dbb833299475c6
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.
Change-Id: I7c2b62697721074660c6b7371e0d2b1bf195ba5d
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add a gpio-keys device for Sun MTP, CDP and QRD boards that use
PM8550 GPIO 6.
Change-Id: I3b6ec4f7cb826cd482e85cdbbcbea3db485284c1
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
