Unnathi Chalicheemala d9c5c5ed56 ARM: dts: msm: Fix the base addresses of LLCC banks for Pineapple SoC ...

Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.

Change-Id: I7c2b62697721074660c6b7371e0d2b1bf195ba5d
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>

2023-10-04 09:25:59 -07:00

bindings

Merge "dt-bindings: Add snapshot of gic interrupt router documentation"

2023-09-27 02:27:00 -07:00

qcom

ARM: dts: msm: Fix the base addresses of LLCC banks for Pineapple SoC

2023-10-04 09:25:59 -07:00

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

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