Qualcomm Technologies, Inc. (QTI) Programmable Boot Sequence
(PBS) devices help triggering certain PBS on QTI PMICs when
available for APPS.
Change-Id: I9148ff20220b998b1634fb9c26d462b2a25d6586
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add Qualcomm Technologies, Inc. PMIC PON log device bindings. The
PMIC PON log device parses power-on, power-off, and fault messages
stored in a binary log within the SDAM memory found on some QTI
PMIC devices.
This is a snapshot of the file qcom,pmic-pon-log.txt taken
as of qcom-6.1 branch
commit 8e58283f0a59 ("dt-bindings: soc: qcom: pmic-pon-log:
define bindings for multiple nvmem") which was then converted
to yaml format.
Change-Id: I6256c17a8334e5ae721427c5d4f1d3352dc72daf
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
The mem-buf device provides memory related services for shared memory
between host and guest VMs.
Change-Id: Iade8224fbea6985c69af9cd30d1c441983e91147
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add the secure-buffer device, which supports hypervisor operations
to change the stage 2 permissions of memory.
Change-Id: I98576bc919aecada2e7ab7bc5dfeadc8979a111d
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
USB controller device doesn't probe due to remote-endpoint depedency
with ucsi device. ucsi device won't be probed as ADSP firmware is
not being loaded. Hence remove ucsi port related remote-endpoint
configuration on pineapple.
While at it, also remove dependency on EUD driver.
Change-Id: I161afb62e63ebeeb13ee5af7b43408c697fd59d6
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Add binding documentation for the SPMI debug bus found on SPMI
PMIC arbiter version 5 and above. This debug bus has read and
write access to all PMIC peripherals regardless of ownership
configurations. It cannot be used on production devices because
it is disabled by an eFuse.
This is a snapshot of the file qcom,spmi-pmic-arb-debug.txt
taken as of qcom-6.1 commit b522c3b6d065 ("dt-bindings: spmi:
spmi-pmic-arb-debug: define enable fuse property")
which was then converted to yaml.
Change-Id: I344ddea23ecb09bede5cbdb19197ab52b24dda44
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add documentation for the qcom,can-sleep property. This is used
for slow SPMI busses which may sleep during transactions.
Change-Id: Ib07ffa28a0aa167571501e2493f5f03ad575755e
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add documentatio for qdss component coresight-remote-etm. correct
the format of qcom,coresight-csr.yaml.
Change-Id: I024a7245997f51a02118d0abf8bd9932763772fb
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Enable cluster 0 cores from the command line instead of just
core 0.
Change-Id: I26b97122d353b3979467109babfded9a095b207d
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
With 16GB of DDR, existing drivers were trying to use 6Mb as follows:
2Mb: dma_atomic_pool_init(GFP_KERNEL)
2Mb: dma_atomic_pool_init(GFP_KERNEL | GFP_DMA32)
2Mb: qcom_iommu_util::dma_atomic_pool_init
Increase the reserved size to 12Mb to leave a small margin.
Change-Id: Id9bdfcca7560d40bddf3c9c526f9e3ee69ba9174
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add the device tree properties to the smem reserved memory region that
to match allows the smem driver to match and probe accordingly.
Change-Id: I4e0bdf3d26a9d0f7cf15a569e08988dddadf8183
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
