Remove unused SW DRVs as keeping them makes them register
with IRQs and leading to spurious IRQs.
Change-Id: Iba8723b7ac734286668158fe793bde97f3f31eda
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Add NVMEM cells FMD_CNT2_STOP and FMD_CHG_PON for supporting
Find-My-Device(FMD) feature.
- FMD_CNT2_STOP controls the number of FMD cycles after which the
feature will auto disable to save power in OFF mode.
- FMD_CHG_PON can be use to disable USB PON feature for testing
purpose.
Change-Id: I0f217d413f2ec8c5616956c4e56fd7e469c52d56
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
legacy SoCs had shutdown ack only available to modem DSP
since waipio, it is even available for ADSP and CDSP and since
we are adding shutdown ack timeout which would wait for these
ack interrupts. Let's add them for ADSP and CDSP as well.
Change-Id: I75c427be29d8d762617ccc1e595929edb9ff2c3b
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Support for MPAM SLC support
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I0752e4841b7997ccf890f68638938f0afbcd1787
Enables HEURISTICS SCID for sun.
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I82e5df505fa1b896ce1d46196f8ed9447f42b0db
Add CPUCP fast device tree entry to get mailbox channel id and cpus to
be controlled with fast.
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I0f0f0a6a13add9f303d13631a90e7c1b4aa558f7
Add documentation for the device qcom,cpucp_fast, which is used
for handling system hints from firmware.
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: If7ddadeceebd7ff51c25f691e7f5a8bc4d033bdb
Add support for ice wrapped keys to the UFS DTSI entry
to ravelin.
Signed-off-by: Shashikala Katthi <quic_skatthi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: If34d4b01f607c556b5acb565a7bf2e6f8b5fe551
Pages are getting allocated from Movable zone even though they
are requested from Normal zone. Disable movable zone as work
around until issue is fixed.
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: Ib55f9e9e75b2087be2e84bcad320d965f66adccc
Add dt support for qseecom for ravelin.
Signed-off-by: Shashikala Katthi <quic_skatthi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I8f7641c8b6cb8fdb371dd75fe2301f992620ee72
Compatible strings for the PM8008 chip and PM8010 regulator nodes
were removed during the bulk DT porting for Ravelin on qcom-6.6
device-tree branch
'commit 1b78f8027a ("ARM: dts: msm: Add initial device tree
for ravelin")'.
Add them back to enable the PM8010 regulator support.
While at it, remove the PM8010's REVID device node references as
they are not required for Ravelin.
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: Id151f80718a56d78e581e7cb571978fb980b0dad
Add the smp2p ipa device nodes to enable smp2p
communication with remote processors.
Signed-off-by: Pavan Kumar M <quic_rpavan@quicinc.com>
Signed-off-by: Jagadeesh Ponduru <quic_jponduru@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: Ifeb4b0da84234a5cec0a47f6e2f2b9520609cfa0
Add qrng device node support for ravelin.
Signed-off-by: Shashikala Katthi <quic_skatthi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I6b5637749de679576e8782e7390fe770c2dce93f
Update uart clock name from se to se-clk for Ravelin.
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I320f94e166f54e41b633473ee3c85bb65fcffa6f
Add interconnect-names qup-core,qup-config and qup-memory to all qupv3
nodes.
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I1b8404e95bbb171847295705b3a10f942d703221
The commit 39dd329a019b ("mem-buf-msgq: Support multiple msgqs")
mandates to have 'msgq-names' property in node 'mem-buf-msgq'.
Adding default msgq entry to fix probe failure.
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I96bb135e3569ded8ca4c9c6a7c5dca34d4dcbaec
Some random aborts are reported in pdt testing, and
signature looks to be due ah8 issue which was fixed on
pineapple.
Signed-off-by: Ram Prakash Gupta <quic_rampraka@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: Ib7d496466e4c59b06ad8ec8f9a365bd7300f82f6
Add interconnect devices for clk_virt_noc, mc_virt_noc,
aggre1_noc, aggre2_noc, cnoc_cfg_noc, cnoc_main_noc, gem_noc,
lpass_ag_noc, lpass_lpiaon_noc, lpass_lpicx_noc, mmss_noc,
nsp_noc, pcie_anoc and system_noc. This will allow consumers
to get their path and set bandwidth constraints on them.
Change-Id: I0f5946c8f529dd7716ab9890221b3a32c4a55570
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Add devicetree nodes to enable qmp communication with aop and tme.
Change-Id: I4e30e6854fcb1d29ea3733d9d59bb01acfe6667b
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Add interconnect device bindings for TUNA SoC. These devices
can be used to describe any RPMH and NoC based interconnect devices.
Change-Id: If040c6ebc9457b9385d75cbbe19ad7cd7bcb7994
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
DWC3 host and XHCI plat now communicates the maximum number
of interrupters the XHCI HCD will allocate. Since platforms
only require a limited number of interrupters (i.e. 3) make
sure XHCI doesn't allocate more than is required.
Change-Id: I9f22a477377873284f1d69fe98c9a466ce237184
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
Add camera and cambistmclk clock controller bindings on tuna device.
While at it, fix existing yaml documentation for dtbs failure.
Change-Id: I8484292fe7336f1bdd4d018e1a342da04148efd1
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Add CPUCP fast device tree entry to get mailbox channel id and cpus to
be controlled with fast.
Change-Id: Ibfc2db806adf97985bf3921fac1244032749d61a
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
Add documentation for the device qcom,cpucp_fast, which is used
for handling system hints from firmware.
Change-Id: I2336051df317d09d5224244e2d8248242980cc18
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
Memmap_on_memory changes the behaviour of memory hotplug to reserve
the first X Mb of a memory block for the struct page array. On arm64,
the size of the struct page array for a 128Mb memory block is 2Mb.
However, the memory-hotplug code requires X to be pageblock aligned (4Mb).
memory_hotplug.memmap_on_memory="force" informs the memory-hotplug core
to round up the size of the memory reserved for struct page array to
meet this 4Mb requirement, even though only 2Mb will actually be used.
This is preferred over allocating the struct page array from ZONE_NORMAL
because adding additional memory into ZONE_NORMAL is not supported on
this target.
Change-Id: I9544b58c202cecddbe80be67a24a1115b162e478
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
