Prakash Yadachi e8ed46620f ARM: dts: msm: Add interconnect-names for Ravelin ...

Add interconnect-names qup-core,qup-config and qup-memory to all qupv3
nodes.

Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I1b8404e95bbb171847295705b3a10f942d703221

2024-07-27 18:31:39 -07:00

bindings

Merge "bindings: Update fields in TLMM VM bindings for Sun"

2024-07-16 01:53:28 -07:00

qcom

ARM: dts: msm: Add interconnect-names for Ravelin

2024-07-27 18:31:39 -07:00

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

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