ARM: dts: msm: Add interconnect devices for TUNA

Add interconnect devices for clk_virt_noc, mc_virt_noc,
aggre1_noc, aggre2_noc, cnoc_cfg_noc, cnoc_main_noc, gem_noc,
lpass_ag_noc, lpass_lpiaon_noc, lpass_lpicx_noc, mmss_noc,
nsp_noc, pcie_anoc and system_noc. This will allow consumers
to get their path and set bandwidth constraints on them.

Change-Id: I0f5946c8f529dd7716ab9890221b3a32c4a55570
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
This commit is contained in:
Raviteja Laggyshetty
2024-04-13 00:00:24 +05:30
parent f99ce7c5c1
commit c7f0e45be6

View File

@@ -12,6 +12,8 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,tcsrcc-sun.h>
#include <dt-bindings/clock/qcom,videocc-tuna.h>
#include <dt-bindings/interconnect/qcom,tuna.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -343,6 +345,10 @@
<CONTROL_TCS 0>,
<FAST_PATH_TCS 1>;
};
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
};
};
@@ -851,6 +857,127 @@
reg = <0x1fc0000 0x30000>;
};
clk_virt: interconnect@0 {
compatible = "qcom,tuna-clk_virt";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@1 {
compatible = "qcom,tuna-mc_virt";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
config_noc: interconnect@1600000 {
compatible = "qcom,tuna-cnoc_cfg";
reg = <0x1600000 0x9200>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
cnoc_main: interconnect@1500000 {
compatible = "qcom,tuna-cnoc_main";
reg = <0x1500000 0x16080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
system_noc: interconnect@1680000 {
compatible = "qcom,tuna-system_noc";
reg = <0x1680000 0x1d080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
pcie_noc: interconnect@16c0000 {
compatible = "qcom,tuna-pcie_anoc";
reg = <0x16c0000 0x11400>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,tuna-aggre1_noc";
reg = <0x16e0000 0x16400>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,tuna-aggre2_noc";
reg = <0x1700000 0x1f400>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
mmss_noc: interconnect@1780000 {
compatible = "qcom,tuna-mmss_noc";
reg = <0x1780000 0x7d800>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
gem_noc: interconnect@24100000 {
compatible = "qcom,tuna-gem_noc";
reg = <0x24100000 0x14d080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
nsp_noc: interconnect@320c0000 {
compatible = "qcom,tuna-nsp_noc";
reg = <0x320c0000 0xe080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
lpass_ag_noc: interconnect@7e40000 {
compatible = "qcom,tuna-lpass_ag_noc";
reg = <0x7e40000 0xe080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
lpass_lpiaon_noc: interconnect@7400000 {
compatible = "qcom,tuna-lpass_lpiaon_noc";
reg = <0x7400000 0x19080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
lpass_lpicx_noc: interconnect@7420000 {
compatible = "qcom,tuna-lpass_lpicx_noc";
reg = <0x7420000 0x44080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
};
};
#include "tuna-gdsc.dtsi"