This change will update dll_usr_ctl to the recommended value.
Change-Id: I345b59546faf950645c0f173ac145e40124170f1
Signed-off-by: Sachin Gupta <quic_sachgupt@quicinc.com>
Use the same rcu configuration values on both PVM and QTVM.
This reduces latency of synchronize_rcu().
Change-Id: If023ae452c56e6172c33ccb2b14767376f86268b
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Upsteam DT does not have phandle for the armv8-timer node,
hence DT overlay is failing during ABL as phandle is necessary
for the overlay. Hence removed the timer node which was included
via upstream DT and added it along with a phandle.
Change-Id: Iba5b3ec985814fa44125c5918900dbf87cb45a6b
Signed-off-by: Keval Kulkarni <quic_kevalbha@quicinc.com>
This change moves the APSS RSC clients under APSS RSC node
as child nodes. Earlier those were wrongly added under SOC.
Change-Id: I7e04b78a138eae18384a4ee976ff2bc0018ea30d
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
Rename "dynamic_clk" to "atclk", using atclk mode to handle this clock.
Change-Id: I9284156854366657594728ebc7815ebe7a533281
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Add devicetree nodes to enable qmp communication with aop and tme.
Change-Id: I62d0020ca600820dd8ce256ee4cbe1ce0dc17b15
Signed-off-by: Vishnu Santhosh <quic_vishsant@quicinc.com>
Add the smp2p device nodes to enable smp2p communication with remote
processors. This adds the configuration for Modem on sdxkova.
Change-Id: Ibd86fcf2a589bfb9f16a645797113f0f0345c81a
Signed-off-by: Vishnu Santhosh <quic_vishsant@quicinc.com>
Add the smp2p nodes for lpaidsp, modem, cdsp and soccp for kera.
Change-Id: If037dbee45de527f6eef54776f2f5b6f1b4e108e
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Remove regulator-always-on property for hap-swr-slave as the driver has
updated to keep the SWR slave always enabled for HAP530_HV haptics
module which is inside pmih010x.
Change-Id: I15eddff38dcdc25012b944572085add11587903c
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
Currently the interconnect provider framework is expecting
the tag QCOM_ICC_TAG_ALWAYS as part of dtsi node of QUP.
In commit 481c435dd1 ("ARM: dts: qcom: sdxkova: update
interconnect providers with bcm-voter-names") interconnect
framework is not expecting the tag QCOM_ICC_TAG_ALWAYS, and
instead it is enabled by default or expects clients to override.
So, updated the QUPv3 and UART interconnects to remove the
additional interconnect tag.
Change-Id: If3780ec7156487f07cc8892a43341d1d9cb88b96
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
Based on build version console configuration is made in monaco.bzl.
Hence remove console configuration from monaco dt.
Change-Id: Ie6c6c60fab4ecd729bc47b5bb87c8ea639f8f775
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
Add the smp2p device node to enable smp2p communication with WPSS.
Change-Id: I5ecfd5962c9136970e19ea646c2433f03e104ef8
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Include IPCC test node for sdxkova, so IPCC kernel-tests can
run on sdxkova.
Change-Id: I96e4f925d62eec54455b8f03f46217fc402e43a5
Signed-off-by: Keval Kulkarni <quic_kevalbha@quicinc.com>
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
Add ipcc node for sdxkova to enable inter processor
communication controller.
Adjust reg format for tz-log node.
Change-Id: I5519f5b8bfc02b2c85c1654a2f39c4ec61fdee9f
Signed-off-by: Keval Kulkarni <quic_kevalbha@quicinc.com>
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
Add support for LLCC for Tuna SoC in devicetree. Also, add
corresponding DT compatible string in bindings.
Change-Id: I16978c988bf691cf350a21edffc28084fa01c6e9
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
Add reserved memory node for CPUSYS_VM and add support for CPUSYS_VM
loading for Tuna target.
Change-Id: If797d5038601ce17208e4da511edbe77c1ad2c9a
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Update interconnect provider device nodes with bcm-voter-names to route
the bandwidth requests through appropriate DRV.
Add necessary clock handles to access the QoS registers.
Change-Id: I5c271682e0b3f094d85fa759e19f8a89ae8f0eff
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
