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ARM: dts: msm: Enable securemsm related nodes for tuna

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Added qseecom, tz-log, qrng, qcedev,qtee_shmbridge,qcom_smcinvoke
securemsm nodes for tuna.

Change-Id: I7600c98cf2301b2e83d327017761e0362439f8e0
Signed-off-by: kundan kumar <quic_kunkum@quicinc.com>
This commit is contained in:
kundan kumar
2024-08-27 12:28:56 +05:30
committed by Ravi Kumar Bokka
parent 03e09aa933
commit 0edda568b1
3 changed files with 146 additions and 0 deletions
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12
qcom/tuna-dma-heaps.dtsi
View File

@@ -15,5 +15,17 @@
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&cdsp_secure_heap_cma>;
};
qcom,qseecom {
qcom,dma-heap-name = "qcom,qseecom";
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&qseecom_mem>;
};
qcom,qseecom_ta {
qcom,dma-heap-name = "qcom,qseecom-ta";
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&qseecom_ta_mem>;
};
};
};

30
qcom/tuna-vm-dma-heaps.dtsi Normal file
View File

@@ -0,0 +1,30 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/arm/msm/qcom_dma_heap_dt_constants.h>
&soc {
qcom,dma-heaps {
compatible = "qcom,dma-heaps";
depends-on-supply = <&qcom_scm>;
qcom,ms1 {
qcom,dma-heap-name = "qcom,ms1";
qcom,dma-heap-type = <HEAP_TYPE_TVM_CARVEOUT>;
qcom,dynamic-heap;
};
qcom,ms2 {
qcom,dma-heap-name = "qcom,ms2";
qcom,dma-heap-type = <HEAP_TYPE_TVM_CARVEOUT>;
qcom,dynamic-heap;
};
qcom,ms3 {
qcom,dma-heap-name = "qcom,ms3";
qcom,dma-heap-type = <HEAP_TYPE_TVM_CARVEOUT>;
qcom,dynamic-heap;
};
};
};

104
qcom/tuna.dtsi
View File

@@ -358,6 +358,7 @@
#include "tuna-reserved-memory.dtsi"
#include "msm-arm-smmu-tuna.dtsi"
#include "tuna-dma-heaps.dtsi"
#include "tuna-vm-dma-heaps.dtsi"
&reserved_memory {
#address-cells = <2>;
@@ -375,6 +376,21 @@
};
};
&firmware {
qcom_scm {
compatible = "qcom,scm";
qcom,dload-mode = <&tcsr 0x19000>;
};
qcom_smcinvoke {
compatible = "qcom,smcinvoke";
};
qtee_shmbridge {
compatible = "qcom,tee-shared-memory-bridge";
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -442,6 +458,11 @@
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
qcom,hdcp {
compatible = "qcom,hdcp";
qcom,use-smcinvoke = <1>;
};
arch_timer: timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
@@ -683,6 +704,7 @@
interrupt-controller;
#interrupt-cells = <2>;
wakeup-parent = <&pdc>;
qcom,gpios-reserved = <54>;
};
tcsr_mutex_block: syscon@1f40000 {
@@ -1310,6 +1332,64 @@
status = "disabled";
};
qcom_tzlog: tz-log@14680720 {
compatible = "qcom,tz-log";
reg = <0x14680720 0x3000>;
qcom,hyplog-enabled;
hyplog-address-offset = <0x410>;
hyplog-size-offset = <0x414>;
tmecrashdump-address-offset = <0x81CA0000>;
};
qcom_cedev: qcedev@1de0000 {
compatible = "qcom,qcedev";
reg = <0x1de0000 0x20000>,
<0x1dc4000 0x28000>;
reg-names = "crypto-base","crypto-bam-base";
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
qcom,bam-pipe-pair = <2>;
qcom,offload-ops-support;
qcom,bam-pipe-offload-cpb-hlos = <1>;
qcom,bam-pipe-offload-hlos-cpb = <3>;
qcom,bam-pipe-offload-hlos-cpb-1 = <8>;
qcom,bam-pipe-offload-hlos-hlos = <4>;
qcom,bam-pipe-offload-hlos-hlos-1 = <9>;
qcom,ce-hw-instance = <0>;
qcom,ce-device = <0>;
qcom,ce-hw-shared;
qcom,bam-ee = <0>;
qcom,smmu-s1-enable;
qcom,no-clock-support;
qcom,no-clk-gating;
interconnect-names = "data_path";
interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
iommus = <&apps_smmu 0x0480 0x0>,
<&apps_smmu 0x0481 0x0>;
qcom,iommu-dma = "atomic";
dma-coherent;
qcom_cedev_ns_cb {
compatible = "qcom,qcedev,context-bank";
label = "ns_context";
iommus = <&apps_smmu 0x0481 0x0>;
dma-coherent;
};
qcom_cedev_s_cb {
compatible = "qcom,qcedev,context-bank";
label = "secure_context";
iommus = <&apps_smmu 0x0483 0x0>;
qcom,iommu-vmid = <0x9>;
qcom,secure-context-bank;
dma-noncoherent;
};
};
rng: rng@10c3000 {
compatible = "qcom,trng";
reg = <0x10c3000 0x1000>;
};
spmi_bus: spmi0_bus: qcom,spmi@c42d000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0xc42d000 0x4000>,
@@ -1649,6 +1729,30 @@
alignment = <0x0 0x400000>;
size = <0x0 0x4800000>;
};
non_secure_display_memory: non_secure_display_region {
compatible = "shared-dma-pool";
reusable;
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
size = <0x0 0xc800000>;
alignment = <0x0 0x400000>;
};
qseecom_mem: qseecom_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x1400000>;
};
qseecom_ta_mem: qseecom_ta_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x1400000>;
};
};
#include "tuna-pinctrl.dtsi"