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4761b271a6b9ab30006660e730272a9dd0c8e94d
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Author SHA1 Message Date
lnxdisplay
4761b271a6 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3805307           I43800260 ARM: dts: msm: add sde_rscc register offset to cesta for sun target

CRs-Included: 3805307 .

Change-Id: If59f5f44c7333e1628ccb9d761b637f5910e21b8
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-07-11 00:07:44 +05:30
QCTECMDR Service
d4b04ab574 Merge "ARM: dts: msm: add sde_rscc register offset to cesta for sun target" 2024-07-08 12:08:23 -07:00
lnxdisplay
55067045f7 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3843158           Iad0635b0 ARM: dts: msm: add pll_codes_region for secondary DSI PHY

CRs-Included: 3843158 .

Change-Id: I2305913bc0efd742d060c3dd1f9bd513b29740ba
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-07-04 10:31:08 +05:30
QCTECMDR Service
a92918fb7f Merge "ARM: dts: msm: add pll_codes_region for secondary DSI PHY" 2024-07-01 22:51:19 -07:00
Rui Chen
d06aefb55d ARM: dts: msm: add pll_codes_region for secondary DSI PHY 
Add pll_codes_region propertity for secondary DSI PHY to
support DSI dynamic clock switch feature.

Change-Id: Iad0635b013094c833f9fb2304b5bbaf728f23360
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
 2024-06-27 18:30:26 -07:00
lnxdisplay
d18d597d6d Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3826752           I41e2e5b3 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target
3811582           I127af4c4 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target

CRs-Included: 3811582,3826752 .

Change-Id: I795934afe85e0e56cf44e9ba82fc65cab00dc83b
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-28 03:15:33 +05:30
QCTECMDR Service
06b66fa9e0 Merge "ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target" 2024-06-27 01:26:49 -07:00
lnxdisplay
05a5ea52c1 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3786154           I6ec180fa ARM: dts: msm: add the identification of rc_override_v1
3786154           Ib889643b bindings: Documentation: add flag for override rc_range_bpg_ofs
3835358           I4756cd2f ARM: dts: msm: enable partial update for spr cmd dphy mode
3842907           I9d1da6be ARM: dts: msm: Add pentile pack type for SPR on sun target

CRs-Included: 3786154,3842907,3835358 .

Change-Id: Ia3a01a8012be31b3ecbd47f9620ab7e1556c281a
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-21 21:07:30 +05:30
Abhinav Saurabh
dc3f289df8 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target 
Update in height alignments from 40 to 20 for FHD 60FPS cmd mode to
match DSC slice settings. The values should be integral multiple of
height defined for panel.

Change-Id: I41e2e5b3ec0b75a6eb2f39879356c92239853f74
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
 2024-06-21 03:19:34 -07:00
QCTECMDR Service
1d7cbb1213 Merge "ARM: dts: msm: add the identification of rc_override_v1" 2024-06-20 16:21:20 -07:00
Veera Sundaram Sankaran
cdc4bd6588 ARM: dts: msm: add sde_rscc register offset to cesta for sun target 
Add the sde_rscc register offset to help in accessing the cesta
status registers.

Change-Id: I438002605a1bdf3ca06c92f4594a71bce70ef387
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
 2024-06-20 15:39:50 -07:00
qctecmdr
0c29083782 Merge "bindings: Documentation: add flag for override rc_range_bpg_ofs" 2024-06-19 15:21:43 -07:00
qctecmdr
7c40d0e683 Merge "ARM: dts: msm: Add pentile pack type for SPR on sun target" 2024-06-18 16:31:23 -07:00
Jinfeng Gu
fddd02548e ARM: dts: msm: add the identification of rc_override_v1 
This change adds the identification of rc_override_v1 and remove
24/20Hz for wqhd command dphy mode due to panel limitation.

Change-Id: I6ec180fa5ffe25ca914ecd270bbe55c3a64e14d8
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-06-18 17:47:41 +08:00
qctecmdr
d38c5d16f5 Merge "ARM: dts: msm: enable partial update for spr cmd dphy mode" 2024-06-17 10:32:51 -07:00
lnxdisplay
7ab2d73ade Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3812803           I01035e33 ARM: dts: msm: add CSOT vid with SPR config

CRs-Included: 3812803 .

Change-Id: I4d762a618a041c38213dbe9a59e8c83d56499a47
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-17 12:51:38 +05:30
qctecmdr
333474e9f1 Merge "ARM: dts: msm: add CSOT vid with SPR config" 2024-06-15 13:45:08 -07:00
lnxdisplay
dc018d6c56 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3831391           I09ac2d1a ARM: dts: msm: add esync pinctrl and clocks
3826326           Ie34c339d ARM: dts: msm: add NT37801 dphy mode with bypass DDIC SPR support

CRs-Included: 3826326,3831391 .

Change-Id: I1ad206272237b2e44513b80971714b4dd7d758d7
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-06-11 16:14:34 +05:30
Jinfeng Gu
dfe2218e11 bindings: Documentation: add flag for override rc_range_bpg_ofs 
Add "qcom,mdss-dsc-rc-override_v1" flag to enable
override rc_range_bpg_ofs in sde_dsc_rc_range_bpg_override_v1.

Change-Id: Ib889643b097dff81f2896afbde48e7273e46a097
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-06-07 16:59:01 +08:00
Jinfeng Gu
a64265d79f ARM: dts: msm: enable partial update for spr cmd dphy mode 
This change enable partial update for spr cmd dphy mode.

Change-Id: I4756cd2f2e64c69922018bae026a47ad00bc23f3
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-06-06 14:56:05 +08:00
qctecmdr
44357ae6f6 Merge "ARM: dts: msm: add esync pinctrl and clocks" 2024-06-04 18:09:31 -07:00
qctecmdr
a65088bd55 Merge "ARM: dts: msm: add NT37801 dphy mode with bypass DDIC SPR support" 2024-05-31 17:52:22 -07:00
Kirill Shpin
bdedd83bd9 ARM: dts: msm: add esync pinctrl and clocks 
Adds pinctrl configuration to pass esync signal through from hw block
to output pin. Also adds esync and oscillator clocks, and makes the
DSI PLL clock available to parse for setting clock parent.

Change-Id: I09ac2d1a334546452176285712d8c953f94aecf2
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
 2024-05-31 11:41:38 -07:00
lnxdisplay
2c01bb5b20 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3801040           I3e89dd85 ARM: dts: msm: update clock rate for csot panel cphy cmd mode

CRs-Included: 3801040 .

Change-Id: Ieb9a8d1e15956029d6167d51052b55f3f99c7c3b
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-31 23:58:29 +05:30
qctecmdr
850855a2e5 Merge "ARM: dts: msm: update clock rate for csot panel cphy cmd mode" 2024-05-31 07:09:55 -07:00
Kirill Shpin
bfd823d9c5 ARM: dts: msm: add CSOT vid with SPR config 
Adds variant of CSOT panel with AP SPR in video mode.

Change-Id: I01035e333822b37c4ebc5ab4cd1d728d0638e979
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
 2024-05-28 11:03:48 +08:00
lnxdisplay
a0761040bf Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3819934           Idb98ba40 ARM: dts: msm: add scaling up code for FHD+ csot panel

CRs-Included: 3819934 .

Change-Id: I998a3053a455ee1dad6c73b75a3b3e27d64533c3
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-27 15:14:39 +05:30
Yuchao Ma
2225cc899e ARM: dts: msm: Add pentile pack type for SPR on sun target 
This change adds pentile pack type for SPR on sun target.

Change-Id: I9d1da6be1262d806e1e8f1820fd3b844d40cfbf3
Signed-off-by: Yuchao Ma <quic_yuchaom@quicinc.com>
 2024-05-27 13:29:03 +08:00
qctecmdr
026077d30b Merge "ARM: dts: msm: add scaling up code for FHD+ csot panel" 2024-05-24 16:48:33 -07:00
Jinfeng Gu
2f83057496 ARM: dts: msm: add NT37801 dphy mode with bypass DDIC SPR support 
This change add NT37801 dphy mode with bypass DDIC SPR support.

Change-Id: Ie34c339d0406867ecc934e3ce55a19bb580d88ca
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-05-24 18:37:14 +08:00
lnxdisplay
1c73731eab Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3811582           I127af4c4 ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target

CRs-Included: 3811582 .

Change-Id: I90fd91007a7c98d8c8baf8c1893e6c9b98ca754f
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-23 05:27:06 +05:30
Jinfeng Gu
ffb6324600 ARM: dts: msm: update clock rate for csot panel cphy cmd mode 
This change increased clock rate with 3% config for cphy cmd mode.

Change-Id: I3e89dd8596ac72712a4e4c38cb69249b6a815c47
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-05-22 15:21:48 +08:00
Jinfeng Gu
fc3c848bb3 ARM: dts: msm: add scaling up code for FHD+ csot panel 
This change add scaling up code in on command for FHD+ csot panel.

Change-Id: Idb98ba4080b7030c317b6530a06912baf432fc79
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-05-22 11:52:40 +08:00
Lei Chen
09992b738b ARM: dts: msm: update panel-roi-alignment for dsi_sim_cmd on sun target 
Update height alignments from 20 to 40 for HD 60FPS cmd mode to
match DSC slice settings. The roi height and width alignment
must be integral multiple of DSC slice height and width.

Change-Id: I127af4c4e6a453757f60677bac787cd4bd4b6d07
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
 2024-05-20 18:33:31 -07:00
lnxdisplay
bee8b2cc46 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3806572           I2c8579f4 ARM: dts: msm: add secondary display support on NT37801 panel

CRs-Included: 3806572 .

Change-Id: Ida3343d345513359bc725bd70b08755d8ff98e6b
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-16 16:25:38 +05:30
Lei Chen
121fe04261 ARM: dts: msm: add secondary display support on NT37801 panel 
Add secondary display support on NT37801 panel for Sun QRD and
MTP target.

Change-Id: I2c8579f4343ae15109942e545e2f76e55aadf038
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
 2024-05-14 18:36:30 -07:00
lnxdisplay
637a2753a7 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3801491           I520eb6be ARM: dts: msm: add new msm-IDs support on sun HDK
3808462           I9a3d00c3 ARM: dts: msm: update address ranges to avoid unsecure context bank for sun target

CRs-Included: 3808462,3801491 .

Change-Id: I6746ce1401cc7c5be84f5f6f1e12afad295921ef
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-13 11:00:52 +05:30
qctecmdr
9a8a071668 Merge "ARM: dts: msm: add new msm-IDs support on sun HDK" 2024-05-09 06:45:04 -07:00
qctecmdr
4398c0f75b Merge "ARM: dts: msm: update address ranges to avoid unsecure context bank for sun target" 2024-05-09 06:45:04 -07:00
Lei Chen
49ae7eacf3 ARM: dts: msm: add new msm-IDs support on sun HDK 
Add new msm-IDs support on sun HDK.

Change-Id: I520eb6be7ece19ce521f5fd7580cc30c72ee87a1
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
 2024-05-07 23:07:01 -07:00
lnxdisplay
3c2c328c14 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3764500           Iee432582 ARM: dts: msm: update clock rate for csot panel cphy cmd mode at 60Hz

CRs-Included: 3764500 .

Change-Id: If76ff6ace69f0fe38eae3bf29ecb5c21ee5e8a80
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-05-02 00:22:08 +05:30
qctecmdr
690cee2694 Merge "ARM: dts: msm: update clock rate for csot panel cphy cmd mode at 60Hz" 2024-05-01 07:49:39 -07:00
Jayasri Sampath Kumaran
8e2c3e1a7e ARM: dts: msm: update address ranges to avoid unsecure context bank for sun target 
Update unsecure context bank to exclude memory region allocated to
display splash, ramdump and demura.

Change-Id: I9a3d00c3943b2a5c94914856f498cb62a7fc4dfa
Signed-off-by: Jayasri Sampath Kumaran <quic_jsampath@quicinc.com>
 2024-04-29 12:59:17 -04:00
lnxdisplay
9387dc3357 Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3758061           I005e861a ARM: dts: msm: add HDK touch support on sun target
3785210           I610a67f7 ARM: dts: msm: add TUI display support

CRs-Included: 3758061,3785210 .

Change-Id: Iccbdf4cafed0ee55b61b1757d064210195ab3375
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
 2024-04-25 04:13:52 +05:30
qctecmdr
9a73559aea Merge "ARM: dts: msm: add HDK touch support on sun target" 2024-04-23 21:20:38 -07:00
qctecmdr
05ce183c89 Merge "ARM: dts: msm: add TUI display support" 2024-04-23 21:20:38 -07:00
Jinfeng Gu
f955236d5d ARM: dts: msm: update clock rate for csot panel cphy cmd mode at 60Hz 
This change update clock rate for csot panel cphy cmd mode at 60Hz.

Change-Id: Iee432582a29304799b9e6a93f3d8e7b8ff1fa2fe
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
 2024-04-23 00:37:42 -07:00
Manoj Kumar AVM
598a26d450 ARM: dts: msm: move MDSS GDSC to genPD on sun target 
This reverts commit 6f466e30c0.

Change-Id: I54c44106ccd36145f1b327d4777c5213a1a62fd3
Signed-off-by: Manoj Kumar AVM <quic_mkavm@quicinc.com>
 2024-04-15 20:09:11 -07:00
Manoj Kumar AVM
667abb6151 ARM: dts: msm: enable display cesta on sun target 
This reverts commit 60ea2afaaa.

Change-Id: I89e385640913e1d05825e7f153ec77d9187b0be8
Signed-off-by: Manoj Kumar AVM <quic_mkavm@quicinc.com>
 2024-04-15 20:08:00 -07:00
Veera Sundaram Sankaran
60ea2afaaa Revert "ARM: dts: msm: enable display cesta on sun target" 
This reverts commit 5b87ecc6bd.
Disable display cesta until reboot recovery issue is fixed.

Change-Id: Iedc5fc570f753532e5f936488d8bcc14a6889be7
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
 2024-04-15 16:35:34 -07:00