Add SPS module to device tree. SPS (Smart Peripheral System)
enables the support of all BAMs in the system which provide DMA
functionality to various peripherals for SUN.
Change-Id: I4b69ad41de0a27921b5cd050b589e7ab7af406e3
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Add device tree nodes for wcd usb subsystem and pmic
sdam_71 needed for usb analog audio, display functionality.
Change-Id: I35cb8e17efb1c7288330a1b125a03b23990a829b
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
GLINK PKT provides a userspace interface to RPMSG GLINK through
character device node. Add the nodes and corresponding channel
devices to enable GLINK communication from userspace.
Change-Id: I0b7c9b273df3201113095fba9c70d10599b8faf7
Signed-off-by: Kishore Kumar Ravi <quic_kiskum@quicinc.com>
Add the smp2p sleepstate and qsee_ipc_irq_bridge
nodes for sun.
Change-Id: Iecdde69fe89d883c87ea9cd527a6753355d2327d
Signed-off-by: Kishore Kumar Ravi <quic_kiskum@quicinc.com>
The mvs0c_gdsc needs to be enabled first for mvs0_gdsc to turn on
reliably, so list it as a parent to enforce this relationship.
Change-Id: I2b6cf6861d1bf8ddb8eb764be3ba175edee9e3db
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Needed for SPU pil on sun dtsi.
Remoteproc-spss, spcom and spss_utils are disabled.
Change-Id: I97519bacccee2f7094edbcf32e3fdac29d67ac77
Signed-off-by: Nurit Lichtenstein <quic_nuritl@quicinc.com>
Add an SPMI debug device and associated PMIC child devices for the
primary SPMI interface. This provides consumers with unrestricted
access to the PMIC registers on pre-production devices. This helps
to simplify debugging.
Change-Id: I920a3655e0e257ee819c7227e154d27ee43f3250
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add PMIC Glink devices and their client devices. The PMIC Glink
device with name PMIC_RTR_ADSP_APPS supports the clients: ucsi,
altmode, and battery_charger. The PMIC Glink device with name
PMIC_LOGS_ADSP_APPS supports the clients: battery_debug,
pmic_glink_debug, charger_ulog_glink, and glink_adc.
Change-Id: Ib5a15c136c77c8368d4a561f266a1588c4649893
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Describe the communication channel used to communicate with the
firmware which supports onlining and offlining of memory.
Keep the device in a disabled state for now until a conflict
between THP and memory-hotplug features can be resolved.
Change-Id: I3d74d9d3d58d379b2a91ee976a72dddfb7a221c6
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add ufs support for mtp/cdp/qrd sun platforms.
Enable ufs's smmu fastmap attribute.
Enable ufs host and device resets.
Change-Id: I7e4194a48c022284308c3debd6e18be40289693b
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Add nodes to enable qcom dcvs, bwmon and memlat
on sun.
Change-Id: I515aa98f01b29fb51be11db33930f96193d13401
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Add nodes to enable scmi communication to cpucp on sun.
Change-Id: I574949e32e397047701f836d54115f56414ea023
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
This change adds system low power violators device node.
Change-Id: Ie4b7923c2ef96d6d762275b7241948e120230163
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
Remove fixed-factor-clock and enable device node for rpmh
clocks under apps_rsc in place of fixed clocks.
Change-Id: I9c4d242882f29f616574e339581722b65f27a74f
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Update enable-method to PSCI. Add idle-states node and
update cpu node to include appropriate idle state.
Disabled all idle-states for rumi.
Change-Id: I313d52c60081ef1d568781e33d0f2fed1a1f2de4
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Based on upstream commit ee13b50 ("qcom: llcc/edac: Fix the base address
used for accessing LLCC banks"), the devicetree needs to be updated with
LLCC bank 0 through 3, instead of just the start LLCC bank 0 and the end
LLCC broadcast.
Change-Id: I1d2b758693f6a71338653fa677dbb833299475c6
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
The clock required to access this GDSC depends on a clock coming from
GPU_CC, which is enabled by default in gpucc probe. Add a phandle to
gpucc to ensure it probes first and enables the required clock.
Change-Id: I5aae1a6a1a3615cf1a8227b839a721a6af945243
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add spmi-pmic-arb devices for the primary and secondary SPMI buses
found on Sun. The primary bus operates at 19.2 MHz and is used for
most of the PMICs.
The secondary bus operates at 4.8 MHz and is used exclusively for
charging PMICs. Note that the secondary bus is not connected to
the SoC on the board due to voltage level differences. Therefore,
keep the secondary bus device disabled.
Change-Id: I6b2bb6b54e285fd9c333971b08134c3768087869
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add base TUIVM and OEMVM device tree support for Sun RUMI platform.
Change-Id: I32598ce2c3488658e2c9caf0cd7a2368665c0b06
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Signed-off-by: Sahitya Tummala <quic_stummala@quicinc.com>
Add device tree entries for smcinvoke, shmbridge and tz-log
drivers and qseecom heaps.
Change-Id: I1a427c66e12a02532097db352a1d26fe5ececb9f
Signed-off-by: Anmolpreet Kaur <quic_anmolpre@quicinc.com>
