Add APQ variant's soc id for ParrotPRO.
Change-Id: If7a807825c441b8dd7b946f76492f61ff3aaf88e
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
(cherry picked from commit 44899fd803df1ce177f03638477a05a2dc59ee9d)
Add test-dbl-tuivm, test-msgq-tuivm and tlmm-vm-test
nodes for parrot and parrot vm.
Change-Id: I15e3312cf74f9ddae27b93a941e7d6c7df844c9b
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
(cherry picked from commit 357667d318)
Memory exhaustion observed with the 6MB hyp memory
while enabling support for AVF. Also there may be
other usecases which might required more MB to run.
So increase hyp mem to 14MB to avoid nomem issues.
Change-Id: I092104e34b13cbc15506c2a3a83bdd3e9420af46
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add interconnect devices for camnoc_virt, ipa_virt, mc_virt,
dc_noc, gem_noc, config_noc, system_noc, aggre1_noc and
mmss_noc. This will allow consumers to get their
path and set bandwidth constraints on them.
Change-Id: I8c2eb0b8a63252cbfcfe44355ad9b4421c8aee5c
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
Add support for cpufreq_hw, clock controller nodes and their
corresponding gdsc's for SM6150.
Change-Id: I7d64cbe80eb7f10277acce0a0c91fb788c3c99dc
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
Split iomemory-ranges for parrot-vm to be inline
with AC aperture settings.
Change-Id: I6dbf890bd607d916d2429577af6ad164e3cd51db
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
(cherry picked from commit 0e84ac98c6)
Add test-dbl-tuivm, test-msgq-tuivm and tlmm-vm-test
nodes for parrot and parrot vm.
Change-Id: I15e3312cf74f9ddae27b93a941e7d6c7df844c9b
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
Split iomemory-ranges for parrot-vm to be inline
with AC aperture settings.
Change-Id: I6dbf890bd607d916d2429577af6ad164e3cd51db
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
Add smp2p, qmp_aop and aoss_qmp device tree node to support
SM6150 platform.
Change-Id: Iff80c2e40ebecd26f2c649007e79506984bfc35b
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
Update the regulator voltages for iot and opk variants of qcs610.
Change-Id: I40ceeb873e8be62c5213b978793c33d7d539c747
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
Added smem, syscon and dependent nodes for SM6150.
Change-Id: Icb9485e46c8720919310bc0e2560bd51b23f5dec
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
Add support for TLMM pinctrl on SM6150 platform.
Change-Id: I45dfd3d84900ed4b24ecda47462c2c5178bbb02f
Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>
Add the Level Shifter's external feedback clock entry to support
the SD card HS50 mode running at 50MHz.
By default, the Sun platforms use the Level Shifter devices with
external feedback clock signal connects back to the MSM in order
for the HS50 mode to work at 50MHz. Without the external feedback
clock, the HS50 mode works at reduced frequency at 37.5MHz.
Change-Id: I56c61411d7f792a389fa85661fce7fa5074e2c9f
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
WLAN has a requirement to trigger a PBS sequence for XO calibration
for factory testing. To support this, expose a new register under
PMK8550 SDAM2 for clients to write input data into and a new PBS
regulator on which clients can vote to trigger the PBS sequence.
Change-Id: I0e4882d842ea57def4dfdfe4baa5e606a3847f40
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
WLAN has a requirement to trigger a PBS sequence for XO
calibration for factory testing. As part of this feature
expose a new register under PMK8550 SDAM2, which will
be used by PBS for reading XO trims settings.
Change-Id: I620b2d9d0ca6b7452f693ff665ddf995f17e4e2c
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
WLAN has a requirement to trigger a PBS sequence for XO calibration
for factory testing. To support this, expose a new register under
PMK8550 SDAM2 for clients to write input data into and a new PBS
regulator on which clients can vote to trigger the PBS sequence.
Change-Id: Ia314c8cba7a6205943b99e7530990ea6dde8b09c
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>