ARM: dts: msm: Add tlmm pinctrl support for SM6150
Add support for TLMM pinctrl on SM6150 platform. Change-Id: I45dfd3d84900ed4b24ecda47462c2c5178bbb02f Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>
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Asit Shah
parent
9beba3aef1
commit
b5604a5ff7
@@ -12,3 +12,7 @@
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compatible = "qcom,qcs610-iot", "qcom,qcs610", "qcom,iot";
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qcom,board-id = <32 0>;
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};
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&tlmm {
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qcom,gpios-reserved = <6 7 8 9>;
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};
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6
qcom/sm6150-pinctrl.dtsi
Normal file
6
qcom/sm6150-pinctrl.dtsi
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@@ -0,0 +1,6 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&tlmm {};
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@@ -566,6 +566,32 @@
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"l3-scu-errirq",
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"l3-scu-faultirq";
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};
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tlmm: pinctrl@03000000 {
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compatible = "qcom,sm6150-pinctrl";
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reg = <0x03000000 0xdc2000>, <0x17c000f0 0x50>;
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reg-names = "pinctrl", "spi_cfg";
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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qcom,gpios-reserved = <0 1 2 3 6 7 8 9>;
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interrupt-controller;
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#interrupt-cells = <2>;
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wakeup-parent = <&pdc>;
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};
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};
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#include "sm6150-regulator.dtsi"
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#include "sm6150-pinctrl.dtsi"
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&tlmm {
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status = "okay";
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};
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