diff --git a/qcom/qcs610-opk.dtsi b/qcom/qcs610-opk.dtsi
index 3fda344a..735b5765 100644
--- a/qcom/qcs610-opk.dtsi
+++ b/qcom/qcs610-opk.dtsi
@@ -12,3 +12,7 @@
 	compatible = "qcom,qcs610-iot", "qcom,qcs610", "qcom,iot";
 	qcom,board-id = <32 0>;
 };
+
+&tlmm {
+	qcom,gpios-reserved = <6 7 8 9>;
+};
diff --git a/qcom/sm6150-pinctrl.dtsi b/qcom/sm6150-pinctrl.dtsi
new file mode 100644
index 00000000..f4da9acb
--- /dev/null
+++ b/qcom/sm6150-pinctrl.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {};
diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi
index 72b62dd6..5be3450d 100644
--- a/qcom/sm6150.dtsi
+++ b/qcom/sm6150.dtsi
@@ -566,6 +566,32 @@
 					"l3-scu-errirq",
 					"l3-scu-faultirq";
 	};
+
+	tlmm: pinctrl@03000000 {
+		compatible = "qcom,sm6150-pinctrl";
+		reg = <0x03000000 0xdc2000>, <0x17c000f0 0x50>;
+		reg-names = "pinctrl", "spi_cfg";
+		interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		qcom,gpios-reserved = <0 1 2 3 6 7 8 9>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		wakeup-parent = <&pdc>;
+	};
 };
 
 #include "sm6150-regulator.dtsi"
+#include "sm6150-pinctrl.dtsi"
+
+&tlmm {
+	status = "okay";
+};