ARM: dts: msm: Update videocc clock node as GenPD provider on Kera

Mark videocc clock node as GenPD provider and disable the video GDSC
regulator nodes for kera platform.
While at it, keep the gdsc's as it is on kera-rumi platform.

Change-Id: I4a41aacbaa7d144f72db48b9af3a336a92ef95aa
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
This commit is contained in:
Anaadi Mishra
2024-09-25 12:26:45 +05:30
parent 0a06675a87
commit 8d7f1a22a8
2 changed files with 10 additions and 2 deletions

View File

@@ -164,3 +164,11 @@
clock-output-names = "rpmh_clocks";
clock-frequency = <19200000>;
};
&video_cc_mvs0_gdsc {
status = "ok";
};
&video_cc_mvs0c_gdsc {
status = "ok";
};

View File

@@ -1872,6 +1872,7 @@
reg-name = "cc_base";
vdd_mm-supply = <&VDD_CX_LEVEL>;
vdd_mxc-supply = <&VDD_MX_LEVEL>;
vdd_mm_mxc_voter-supply = <&VDD_CX_LEVEL>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>,
@@ -1882,6 +1883,7 @@
"iface";
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
qti,smmu-proxy {
@@ -3233,14 +3235,12 @@
&video_cc_mvs0_gdsc {
clocks = <&gcc GCC_VIDEO_AHB_CLK>;
clock-names = "ahb_clk";
status = "ok";
};
&video_cc_mvs0c_gdsc {
clocks = <&gcc GCC_VIDEO_AHB_CLK>;
clock-names = "ahb_clk";
parent-supply = <&VDD_CX_LEVEL>;
status = "ok";
};
&reserved_memory {