ARM: dts: msm: Add support for RPMHCC and DEBUGCC on Kera platform

Add support for rpmh and debug clock controller nodes on Kera platform.
While at it, keep rpmhcc node as dummy for KERA rumi platform.

Change-Id: Ic11513d45bbc9b3f172a411f854a2348af4bfb94
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>

qcom/kera-rumi.dtsi

@@ -158,3 +158,9 @@
 &APSS_OFF {
 	status = "disabled";
 };
+
+&rpmhcc {
+	compatible = "fixed-clock";
+	clock-output-names = "rpmh_clocks";
+	clock-frequency = <19200000>;
+};

qcom/kera.dtsi

@@ -636,6 +636,11 @@
 				qcom,llcc-bcm-name = "SH5";
 
 			};
+
+			rpmhcc: clock-controller {
+				compatible = "qcom,tuna-rpmh-clk";
+				#clock-cells = <1>;
+			};
 		};
 	};
 
@@ -1732,13 +1737,6 @@
 		};
 	};
 
-	rpmhcc: clock-controller {
-		compatible = "fixed-clock";
-		clock-output-names = "rpmh_clocks";
-		clock-frequency = <19200000>;
-		#clock-cells = <1>;
-	};
-
 	cambistmclkcc: clock-controller@1760000 {
 		compatible = "qcom,tuna-cambistmclkcc", "syscon";
 		reg = <0x1760000 0x6000>;
@@ -3083,6 +3081,46 @@
 		qcom,count-unit = <0x10000>;
 		qcom,target-dev = <&qcom_ddr_dcvs_hw>;
 	};
+
+	apsscc: syscon@17a80000 {
+		compatible = "syscon";
+		reg = <0x17a80000 0x21000>;
+	};
+
+	mccc: syscon@240ba000 {
+		compatible = "syscon";
+		reg = <0x240ba000 0x800>;
+	};
+
+	debugcc: clock-controller@0 {
+		compatible = "qcom,kera-debugcc";
+		qcom,apsscc = <&apsscc>;
+		qcom,cambistmclkcc = <&cambistmclkcc>;
+		qcom,camcc = <&camcc>;
+		qcom,dispcc = <&dispcc>;
+		qcom,gcc = <&gcc>;
+		qcom,gpucc = <&gpucc>;
+		qcom,tcsrcc = <&tcsrcc>;
+		qcom,videocc = <&videocc>;
+		qcom,mccc = <&mccc>;
+		clocks = <&rpmhcc RPMH_CXO_CLK>,
+			 <&cambistmclkcc 0>,
+			 <&camcc 0>,
+			 <&dispcc 0>,
+			 <&gcc 0>,
+			 <&gpucc 0>,
+			 <&tcsrcc 0>,
+			 <&videocc 0>;
+		clock-names = "xo_clk_src",
+			      "cambistmclkcc",
+			      "camcc",
+			      "dispcc",
+			      "gcc",
+			      "gpucc",
+			      "tcsrcc",
+			      "videocc";
+		#clock-cells = <1>;
+	};
 };
 
 #include "tuna-gdsc.dtsi"