Satya Durga Srinivasu Prabhala d6149c4ac6 ARM: dts: msm: correct soccp-config offset for Sun SOC ...

SOCCP sleep status register is incorrectly set to 0x9a000, correct it.

Change-Id: I8533e9788614dbb4862ddd272caee7e76b96ed7e
Signed-off-by: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com>

2023-12-27 17:31:29 -08:00

bindings

Merge "dt-bindings: Add bindings for max31760 fan controller"

2023-12-18 11:12:25 -08:00

qcom

ARM: dts: msm: correct soccp-config offset for Sun SOC

2023-12-27 17:31:29 -08:00

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Description

No description provided

11 MiB

Languages

Makefile 81.1%

Starlark 18.9%