91808d9891
Enable display on kera trustedvm platforms. Change-Id: I76a769baa8726f24a391b612b6558d8322e96527 Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com> Signed-off-by: lnxdisplay <lnxdisplay@localhost>
45 lines
1.1 KiB
Plaintext
45 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/clock/qcom,dispcc-tuna.h>
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#include <dt-bindings/clock/qcom,gcc-kera.h>
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#include "kera-sde-common.dtsi"
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&soc {
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};
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&mdss_mdp {
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};
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&mdss_dsi0 {
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clocks = <&clock_cpucc DISP_CC_MDSS_BYTE0_CLK>,
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<&clock_cpucc DISP_CC_MDSS_BYTE0_CLK_SRC>,
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<&clock_cpucc DISP_CC_MDSS_BYTE0_INTF_CLK>,
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<&clock_cpucc DISP_CC_MDSS_PCLK0_CLK>,
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<&clock_cpucc DISP_CC_MDSS_PCLK0_CLK_SRC>,
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<&clock_cpucc DISP_CC_MDSS_ESC0_CLK>;
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clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",
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"pixel_clk", "pixel_clk_rcg", "esc_clk";
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};
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&mdss_dsi1 {
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clocks = <&clock_cpucc DISP_CC_MDSS_BYTE1_CLK>,
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<&clock_cpucc DISP_CC_MDSS_BYTE1_CLK_SRC>,
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<&clock_cpucc DISP_CC_MDSS_BYTE1_INTF_CLK>,
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<&clock_cpucc DISP_CC_MDSS_PCLK1_CLK>,
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<&clock_cpucc DISP_CC_MDSS_PCLK1_CLK_SRC>,
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<&clock_cpucc DISP_CC_MDSS_ESC1_CLK>;
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clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",
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"pixel_clk", "pixel_clk_rcg", "esc_clk";
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};
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&mdss_dsi_phy0 {
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qcom,dsi-pll-in-trusted-vm;
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};
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&mdss_dsi_phy1 {
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qcom,dsi-pll-in-trusted-vm;
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};
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