// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <dt-bindings/clock/qcom,dispcc-tuna.h>
#include <dt-bindings/clock/qcom,gcc-kera.h>
#include "kera-sde-common.dtsi"

&soc {
};

&mdss_mdp {
};

&mdss_dsi0 {
	clocks = <&clock_cpucc DISP_CC_MDSS_BYTE0_CLK>,
		<&clock_cpucc DISP_CC_MDSS_BYTE0_CLK_SRC>,
		<&clock_cpucc DISP_CC_MDSS_BYTE0_INTF_CLK>,
		<&clock_cpucc DISP_CC_MDSS_PCLK0_CLK>,
		<&clock_cpucc DISP_CC_MDSS_PCLK0_CLK_SRC>,
		<&clock_cpucc DISP_CC_MDSS_ESC0_CLK>;
	clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",
			"pixel_clk", "pixel_clk_rcg", "esc_clk";
};

&mdss_dsi1 {
	clocks = <&clock_cpucc DISP_CC_MDSS_BYTE1_CLK>,
		<&clock_cpucc DISP_CC_MDSS_BYTE1_CLK_SRC>,
		<&clock_cpucc DISP_CC_MDSS_BYTE1_INTF_CLK>,
		<&clock_cpucc DISP_CC_MDSS_PCLK1_CLK>,
		<&clock_cpucc DISP_CC_MDSS_PCLK1_CLK_SRC>,
		<&clock_cpucc DISP_CC_MDSS_ESC1_CLK>;
	clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",
			"pixel_clk", "pixel_clk_rcg", "esc_clk";
};

&mdss_dsi_phy0 {
	qcom,dsi-pll-in-trusted-vm;
};

&mdss_dsi_phy1 {
	qcom,dsi-pll-in-trusted-vm;
};