Uttkarsh Aggarwal 1040b85b03 ARM: dts: msm: Define maximum number of USB XHCI interrupters ...

DWC3 host and XHCI plat now communicates the maximum number of interrupters
the XHCI HCD will allocate.  Since platforms only require a limited number
of interrupters (i.e. 3) make sure XHCI doesn't allocate more than is
required.

Change-Id: I47ddfb603490afd2ab51d7c7fa9ecf844729eb62
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>

2024-11-29 15:19:05 +05:30

bindings

Merge "dt-bindings: thermal: Document pmiv010x compatible for bcl pmic5"

2024-11-27 13:08:31 -08:00

qcom

ARM: dts: msm: Define maximum number of USB XHCI interrupters

2024-11-29 15:19:05 +05:30

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

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