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Author SHA1 Message Date
Uttkarsh Aggarwal
1040b85b03 ARM: dts: msm: Define maximum number of USB XHCI interrupters 
DWC3 host and XHCI plat now communicates the maximum number of interrupters
the XHCI HCD will allocate.  Since platforms only require a limited number
of interrupters (i.e. 3) make sure XHCI doesn't allocate more than is
required.

Change-Id: I47ddfb603490afd2ab51d7c7fa9ecf844729eb62
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
 2024-11-29 15:19:05 +05:30
QCTECMDR Service
09aecebe0c Merge "ARM: dts: msm: Reserve 32kb to dcc on HLOS" 2024-11-27 20:51:53 -08:00
QCTECMDR Service
1bf2b7bcda Merge "ARM: dts: msm: Update platform MPAM address node for Tuna" 2024-11-27 20:51:53 -08:00
QCTECMDR Service
914fa6a79a Merge "ARM: dts: msm: Add interconnect voting for Debug UART instance in Tuna" 2024-11-27 13:08:31 -08:00
QCTECMDR Service
b95397b61c Merge "dt-bindings: thermal: Document pmiv010x compatible for bcl pmic5" 2024-11-27 13:08:31 -08:00
QCTECMDR Service
bd6872ddf2 Merge "ARM: dts: msm: Update the clock frequency dt flag name" 2024-11-27 13:08:31 -08:00
Shivnandan Kumar
8462c0a844 ARM: dts: msm: Update platform MPAM address node for Tuna 
Update the platform MPAM address node for Tuna.

Change-Id: I792ee36329055b2be266f97b05f4afb003389b97
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
 2024-11-27 23:33:20 +05:30
QCTECMDR Service
33ec100485 Merge "ARM: dts: msm: Add wcd_usbss reference to USB on tuna" 2024-11-27 05:22:57 -08:00
QCTECMDR Service
03fe2128cc Merge "ARM: dts: msm: add trusted touch properties for tuna" 2024-11-27 05:22:57 -08:00
QCTECMDR Service
20a3999d0b Merge "ARM: dts: msm: Update UFS PHY compatible for tuna SoC" 2024-11-27 05:22:56 -08:00
QCTECMDR Service
c35a4e1874 Merge "ARM: dts: msm: Add BOB regulator node for kera" 2024-11-27 00:34:24 -08:00
QCTECMDR Service
a4c02f8f32 Merge "ARM: dts: msm: Correct coresight components for tuna" 2024-11-27 00:34:24 -08:00
QCTECMDR Service
d50a43354e Merge "ARM: dts: msm: add reserved mem for secure_etr" 2024-11-27 00:34:24 -08:00
Prasanna S
3307867c54 ARM: dts: msm: Add interconnect voting for Debug UART instance in Tuna 
Currently, the interconnect path for the debug UART instance
(i.e., qupv3_se7_2uart) is not added, resulting in a NOC error
due to missing QUP voting.

To prevent the NOC error, add the interconnect path for the debug
UART instance.

Fixes: 7cb884c241 ("ARM: dts: msm: Add QUPv3 and GPI DT nodes on tuna")
Change-Id: I6a3829638a244c969d274fe118e51cac7fd0f858
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
 2024-11-26 22:40:08 -08:00
Anand Tarakh
203b7b8def ARM: dts: msm: add trusted touch properties for tuna 
Add trusted touch properties for tuna on CDP, MTP,
and RCM platforms.

Change-Id: I4bee57441d3b6298a0e471be00a7ab8baa132435
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
 2024-11-27 10:48:45 +05:30
QCTECMDR Service
9b93498e07 Merge "ARM: dts: qcom: Add cpufreq cycle counter for kera" 2024-11-26 15:54:59 -08:00
QCTECMDR Service
d5fd1b948d Merge "ARM: dts: msm: Add memory and clock support for ravelin-VM" 2024-11-26 15:54:59 -08:00
QCTECMDR Service
6b51f41394 Merge "ARM: dts: msm: Remove sys-therm-1 vadc channel for tuna" 2024-11-26 12:12:17 -08:00
QCTECMDR Service
c851adae6d Merge "ARM: dts: qcom: Update regulator support for tuna-kiwi platform" 2024-11-26 12:12:17 -08:00
Paras Sharma
8d7c4159c5 ARM: dts: msm: Update the clock frequency dt flag name 
On 6.6 kernel, clock-frequency flag name has been updated to
qcom,pcie-clock-frequency.

Update the clock-frequency dt flag name to qcom,pcie-clock-frequency.

Change-Id: I68c74d3b81ea65d30e7b8a2e8a432ad34d025077
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
 2024-11-27 00:12:53 +05:30
QCTECMDR Service
e61366fa96 Merge "ARM: dts: msm: Remove the CXM UART2 GPIOs" 2024-11-26 04:37:19 -08:00
QCTECMDR Service
713e0d3d93 Merge "ARM: dts: msm: Adding SMMU Proxy for Kera" 2024-11-26 04:37:19 -08:00
QCTECMDR Service
a6b4242cf8 Merge "ARM: dts: msm: enable gpu-tpdm and video-tpdm for tuna" 2024-11-26 04:37:19 -08:00
QCTECMDR Service
dfd3103619 Merge "ARM: dts: msm: Define dtsi property memory-region in SVM Kera and Tuna" 2024-11-26 04:37:19 -08:00
Manaf Meethalavalappu Pallikunhi
498fb7c656 dt-bindings: thermal: Document pmiv010x compatible for bcl pmic5 
This change documents pmiv010x compatible for bcl pmic5.

Change-Id: Ia8a1c790981488fd3175854e2c54e09f137e3ec5
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
 2024-11-26 15:42:47 +05:30
Kavya Nunna
e253a0d843 ARM: dts: msm: Add BOB regulator node for kera 
Add bob regulator node and update rpmh regulator
voltages as per the latest HW recommendations for kera.

Change-Id: I5e258e01c27f76038f3059315bfaf42f24ea6bdf
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2024-11-26 02:05:25 -08:00
Kavya Nunna
97f7a0c865 ARM: dts: qcom: Update regulator support for tuna-kiwi platform 
Update S1G min/max & initial voltage for tuna-kiwi platform.
While at it make below changes
1.Disable the unused rails for tuna boards.
2. Update always-on property for L3G for RCM kiwi platform
   for FMD feature.

Change-Id: I92e01d48b5c3cb9f64b6aa7be37c0ebb27f378b7
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2024-11-26 01:44:02 -08:00
songchai
ece4aeb32c ARM: dts: msm: Reserve 32kb to dcc on HLOS 
Reserve 32kb to dcc on HLOS.

Change-Id: Ib13b11a8e06792e721bdd95405ae99763c43dad1
Signed-off-by: songchai <quic_songchai@quicinc.com>
 2024-11-26 17:19:31 +08:00
Kavya Nunna
8cceef71db ARM: dts: msm: Remove sys-therm-1 vadc channel for tuna 
Remove sys-therm-1 vadc channel as it is handled
in other subsystems.

Change-Id: If80f2f5ffcf0299ad15537189c5ef1337e8ae87e
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2024-11-26 00:54:28 -08:00
Atul Pant
91ac0fb4e5 ARM: dts: qcom: Add cpufreq cycle counter for kera 
Add cpufreq cycle counter register information to devicetree in a
separate node.

Change-Id: Ib9c21300cda585d4f25be12cb9527d719eb630ea
Signed-off-by: Atul Pant <quic_atulpant@quicinc.com>
 2024-11-26 11:23:23 +05:30
QCTECMDR Service
82981ddc76 Merge "ARM: dts: qcom: Update vbat thermal zone and pmxr2230 bcl compatible for tuna" 2024-11-25 19:07:42 -08:00
QCTECMDR Service
4616cbfc2b Merge "ARM: dts: msm: Add SDCC support for kera" 2024-11-25 19:07:42 -08:00
QCTECMDR Service
8448614849 Merge "dt-bindings: soc: qcom: Add documentation for ufs-phy-qmp-v4-niobe" 2024-11-25 19:07:42 -08:00
QCTECMDR Service
f22050cf26 Merge "ARM: dts: msm: Add pinctrl support on Kera VM" 2024-11-25 15:19:02 -08:00
QCTECMDR Service
c35c3c6cf5 Merge "bindings: usb: qcom,dwc-usb3-msm: Add vbus_dwc3-supply property to bindings" 2024-11-25 15:19:02 -08:00
QCTECMDR Service
455351f638 Merge "ARM: dts: msm: enable 'fw_devlink.strict' for Ravelin" 2024-11-25 15:19:02 -08:00
Prasanna S
00b06e64e6 ARM: dts: msm: Define dtsi property memory-region in SVM Kera and Tuna 
Property memory-region is not defined for secure I2C/SPI QUP wrapper
instance and GPI instance. Updated the property correctly now.

Fixes: f1bff316cc ("ARM: dts: msm: Add spi, i2c, gpi nodes for SVM tuna")
Fixes: e6e2aa812d ("ARM: dts: msm: Add spi, i2c, gpi nodes for SVM kera")
Change-Id: I9f43e38ea78c90009708070beca75e3a93bf5424
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
 2024-11-25 04:38:22 -08:00
QCTECMDR Service
67080b49f9 Merge "ARM: dts: msm: Update IOMMU address for tuna SDC2" 2024-11-25 04:11:05 -08:00
QCTECMDR Service
c13bdbe1b3 Merge "ARM: dts: msm: Update stdout-path with serial0 alias" 2024-11-25 04:11:05 -08:00
QCTECMDR Service
3ef28c69f8 Merge "ARM: dts: msm: Configure QoS and shared_ice for kera UFS" 2024-11-25 04:11:05 -08:00
Souradeep Chowdhury
fbbf0509cd ARM: dts: msm: Remove the CXM UART2 GPIOs 
Remove the list of GPIOs reserved for CXM UART2(111,112)
as it is no longer required.

Change-Id: I8fafe3005019e3df68ab6cf065d67f684401ecce
Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
 2024-11-25 15:59:50 +05:30
Manish Pandey
0dae88ae5a ARM: dts: msm: Update UFS PHY compatible for tuna SoC 
Update tuna ufs device tree to use niobe UFS PHY driver. Hence
align with UFS SoC guide settings in HSR v19 specifications.

Change-Id: Ide94078330afa1cec339899fba537536d00acd09
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
 2024-11-25 02:23:11 -08:00
songchai
853abf024c ARM: dts: msm: enable gpu-tpdm and video-tpdm for tuna 
enable gpu-tpdm and video-tpdm for tuna.

Change-Id: I051c3bca93f124c9300dbf780c5601800d1f2fbc
Signed-off-by: songchai <quic_songchai@quicinc.com>
 2024-11-25 18:15:33 +08:00
Manish Pandey
a47d4a368a dt-bindings: soc: qcom: Add documentation for ufs-phy-qmp-v4-niobe 
Add documentation for ufs-phy-qmp-v4-niobe phy driver.

Change-Id: I2f94ba0b60cceb94789b5d2865d36d7d522ea12b
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
 2024-11-25 15:34:00 +05:30
Manish Pandey
e5af4b755e ARM: dts: msm: Update UFS_RESET pin for kera 
Commit e3eceb0 (pinctrl:qcom:Add support for Kera SoC in pin control)
updates the UFS_RESET pin from 184 to 185. This commit updates kera
UFS 'reset-gpios' to 185 to ensure proper functioning of UFS.

Change-Id: I9b850a7c997303b467b6fea4a64bc19ec3e6372c
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
 2024-11-25 15:18:03 +05:30
Manish Pandey
c9b972e848 ARM: dts: msm: Add SDCC support for kera 
Add SD Card support for tuna atp, cdp, mtp, rcm and qrd platform.

Change-Id: Iedace83cae3100624b4694845c4747994eb08f80
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
 2024-11-25 15:06:02 +05:30
QCTECMDR Service
5ab65231ac Merge "ARM: dts: msm: Add SLC MPAM nodes for tuna" 2024-11-25 00:46:06 -08:00
QCTECMDR Service
285a6b5507 Merge "ARM: dts: msm: Add MPAM,NOC BW MPAM node for Tuna" 2024-11-25 00:46:06 -08:00
QCTECMDR Service
23a347704e Merge "ARM: dts: msm: Update card detection pin for tuna" 2024-11-25 00:46:06 -08:00
QCTECMDR Service
e99ab703f6 Merge "dt-bindings: clock: qcom: add GCC and DISPCC bindings for tuna-v1" 2024-11-25 00:46:06 -08:00