Commit Graph

138 Commits

Author SHA1 Message Date
Jinfeng Gu
ffb6324600 ARM: dts: msm: update clock rate for csot panel cphy cmd mode
This change increased clock rate with 3% config for cphy cmd mode.

Change-Id: I3e89dd8596ac72712a4e4c38cb69249b6a815c47
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-05-22 15:21:48 +08:00
Lei Chen
121fe04261 ARM: dts: msm: add secondary display support on NT37801 panel
Add secondary display support on NT37801 panel for Sun QRD and
MTP target.

Change-Id: I2c8579f4343ae15109942e545e2f76e55aadf038
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
2024-05-14 18:36:30 -07:00
qctecmdr
9a8a071668 Merge "ARM: dts: msm: add new msm-IDs support on sun HDK" 2024-05-09 06:45:04 -07:00
qctecmdr
4398c0f75b Merge "ARM: dts: msm: update address ranges to avoid unsecure context bank for sun target" 2024-05-09 06:45:04 -07:00
Lei Chen
49ae7eacf3 ARM: dts: msm: add new msm-IDs support on sun HDK
Add new msm-IDs support on sun HDK.

Change-Id: I520eb6be7ece19ce521f5fd7580cc30c72ee87a1
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
2024-05-07 23:07:01 -07:00
qctecmdr
690cee2694 Merge "ARM: dts: msm: update clock rate for csot panel cphy cmd mode at 60Hz" 2024-05-01 07:49:39 -07:00
Jayasri Sampath Kumaran
8e2c3e1a7e ARM: dts: msm: update address ranges to avoid unsecure context bank for sun target
Update unsecure context bank to exclude memory region allocated to
display splash, ramdump and demura.

Change-Id: I9a3d00c3943b2a5c94914856f498cb62a7fc4dfa
Signed-off-by: Jayasri Sampath Kumaran <quic_jsampath@quicinc.com>
2024-04-29 12:59:17 -04:00
qctecmdr
9a73559aea Merge "ARM: dts: msm: add HDK touch support on sun target" 2024-04-23 21:20:38 -07:00
qctecmdr
05ce183c89 Merge "ARM: dts: msm: add TUI display support" 2024-04-23 21:20:38 -07:00
Jinfeng Gu
f955236d5d ARM: dts: msm: update clock rate for csot panel cphy cmd mode at 60Hz
This change update clock rate for csot panel cphy cmd mode at 60Hz.

Change-Id: Iee432582a29304799b9e6a93f3d8e7b8ff1fa2fe
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-04-23 00:37:42 -07:00
qctecmdr
1ed952b865 Merge "ARM: dts: msm: update pps for csot panel" 2024-04-10 19:24:59 -07:00
qctecmdr
372e2c4f39 Merge "ARM: dts: msm: move MDSS GDSC to genPD on sun target" 2024-04-10 13:36:49 -07:00
Jinfeng Gu
8e290407c5 ARM: dts: msm: update pps for csot panel
This change update pps from init code for csot panel.

Change-Id: Ib1790e96dde6e72afaa060e8796337176dab6834
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-04-09 17:44:31 +08:00
Rui Chen
06f2830f83 ARM: dts: msm: add HDK touch support on sun target
Add touch node for HDK on sun target.

Change-Id: I005e861afaf866b57eef7de8fc640d255adc5ec9
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
2024-04-08 17:23:30 +08:00
Jinfeng Gu
daf6614ab6 ARM: dts: msm: add FHD+ mode for csot panel
This change add a mode with FHD+ resolution for csot panel.

Change-Id: I72c5efc4159fb0ed99fcaa5fd93069601993d598
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-04-08 14:33:21 +08:00
Anjaneya Prasad Musunuri
b9fe27e94b Revert "ARM: dts: msm: introduce disp cc memory region"
This reverts commit 33797c66a4.

Reason for revert: retention to be handled through clock api.

Change-Id: Ib7e54924779e78f839a80e91342344c28b877b0c
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
2024-04-06 01:47:48 -07:00
qctecmdr
e6f52e27ff Merge "ARM: dts: msm: add package ID to msm-IDs for sun target" 2024-04-05 11:06:24 -07:00
qctecmdr
b25a413cce Merge "ARM: dts: msm: enable display cesta on sun target" 2024-04-05 11:06:24 -07:00
Veera Sundaram Sankaran
2a10b6cef3 ARM: dts: msm: move MDSS GDSC to genPD on sun target
Move the MDSS GDSC from regulator to power-domain on
sun target. This will align with upstream usage.

Change-Id: I8e5e3330fa0d13d496336f82d3eaee44c921f903
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2024-04-04 12:20:33 -07:00
Jayasri Sampath Kumaran
bc2bc86531 ARM: dts: msm: add package ID to msm-IDs for sun target
Add additional device trees and msm-IDs to support an additional
package ID. Also update board id for QMP1000 V6 variant on MTP for
sun target.

Change-Id: Ic6287bc0052cb44321674e16c74631c8a75f2aef
Signed-off-by: Jayasri Sampath Kumaran <quic_jsampath@quicinc.com>
2024-04-01 15:43:36 -04:00
Lei Chen
d99e41b0f0 ARM: dts: msm: add HDK variant DT support on sun target
Add HDK variant DT support on sun target.

Change-Id: I18be1e19013713ed0984e087d5f28638ab5c438c
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
2024-03-31 18:54:57 -07:00
Linux Build Service Account
6f578cd4ac Merge "ARM: dts: msm: replace dtsi bindings with yaml" into display-kernel-dev.lnx.1.0 2024-03-29 21:34:53 -07:00
Jatin Srivastava
7791bd1e32 ARM: dts: msm: replace dtsi bindings with yaml
Replace existing display dtsi bindings in text format with
yaml format.

Change-Id: I9964bfe20f474746739f63a5615726f3ebb7683d
Signed-off-by: Jatin Srivastava <quic_jsrivast@quicinc.com>
2024-03-28 12:11:50 -07:00
Veera Sundaram Sankaran
5b87ecc6bd ARM: dts: msm: enable display cesta on sun target
Add display cesta related DT node and configs on sun target.
Move the GDSC & MDP core clk from mdp to cesta node, as it will
be controlled through cesta. Add the cesta related register
offsets in trusted-vm DT for incoming io validation during the
transition.

Change-Id: I1f5ebf59db2169dfae3801f572c80af9e016e667
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2024-03-27 23:50:06 -07:00
yadwan
6e95e5d4d0 ARM: dts: msm: update demura memory regions for sun
This change adds demura memory entries to reservered memory regions.

Change-Id: I2050ba028c2aa2cfa192d8eac817921af7d8fac6
Signed-off-by: yadwan <quic_yadwan@quicinc.com>
2024-03-25 18:36:34 -07:00
Sabarinath M B
b1d94b03e7 ARM: dts: msm: modify panel-roi-alignment for csot panel
Update panel-roi-alignment with correct alignment values.

Change-Id: I783ff3a32008db53c59f8fa11d72b9b44cab6575
Signed-off-by: Sabarinath M B <quic_sabamb@quicinc.com>
2024-03-13 23:51:28 -07:00
Linux Build Service Account
1999d279cf Merge "ARM: dts: msm: add support for MTP QMP1000 variants for sun target" into display-kernel-dev.lnx.1.0 2024-03-08 13:59:05 -08:00
Linux Build Service Account
f5412188eb Merge "ARM: dts: msm: add license/copyright to panels" into display-kernel-dev.lnx.1.0 2024-03-08 13:34:12 -08:00
Linux Build Service Account
a5afc8886f Merge "ARM: dts: msm: enable qsync for csot panel on sun target" into display-kernel-dev.lnx.1.0 2024-03-08 13:34:11 -08:00
Linux Build Service Account
57d38841a0 Merge "ARM: dts: msm: add NT37801 10 bits cmd mode panel support" into display-kernel-dev.lnx.1.0 2024-03-08 13:34:11 -08:00
Jinfeng Gu
344e1a69e9 ARM: dts: msm: enable qsync for csot panel on sun target
This change enable qsync for csot panel on sun target.

Change-Id: I50068d98a263f28bc68a300b445125ce5ee73dff
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-03-07 10:13:32 +08:00
Rui Chen
2f2c7b99e1 ARM: dts: msm: add TUI display support
Add TUI touch support on vm display panel.

Change-Id: I610a67f73837399b652950001251ffb1cdeec80b
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
2024-03-04 11:08:42 +08:00
Jinfeng Gu
39f6c30dc4 ARM: dts: msm: add NT37801 10 bits cmd mode panel support
This change add NT37801 10 bits cmd mode panel support.

Change-Id: I0e5472ea28b0e7e1725194d8b23e67b6c79509b5
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-03-02 22:18:20 +08:00
Kirill Shpin
3c8a246c1f ARM: dts: msm: remove long regulator sleep
Lowers the TVDD regulator's post on sleep duration from 2000ms.

Change-Id: I4a0aed93eb56aab93f5b4f792c79ede1ac1fd4fc
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
2024-03-01 14:33:27 -08:00
Linux Build Service Account
b05a748e0c Merge "ARM: dts: msm: update partial update roi for csot panel" into display-kernel-dev.lnx.1.0 2024-02-28 23:26:55 -08:00
Kirill Shpin
310142dab6 ARM: dts: msm: add CSOT with SPR config
Adds new variant of the CSOT command mode panel with SPR enabled
on AP side, as opposed to DDIC side.

Change-Id: I94cfc2150e7b714822349a5ff9392351e2e22356
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
2024-02-28 14:39:51 -08:00
Jinfeng Gu
10a1d04ea4 ARM: dts: msm: update partial update roi for csot panel
This change updates the partial update roi for csot cmd mode panel.

Change-Id: Iafdbe00243a5a2f3162e2dbfc2a79143ab4a29ff
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-02-27 20:47:58 -08:00
Kirill Shpin
33a37fea08 ARM: dts: msm: add license/copyright to panels
Adds missing license and copyright information to all panel files,
which don't currently have them.

Change-Id: I73b6b6da76a28a4d3e9f86924c8d2732b41f90de
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
2024-02-27 17:09:15 -08:00
Jinfeng Gu
c8fc77e24c ARM: dts: msm: add NT37801 10 bits video mode panel support
This change add NT37801 10 bits video mode panel support.

Change-Id: I7c82b55ed49d6e361278f8285a6ff4373febc3ed
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-02-27 11:53:51 +08:00
Jayasri Sampath Kumaran
8794f7fa80 ARM: dts: msm: add support for MTP QMP1000 variants for sun target
Add QMP1000 with v6 and v8 power grid for MTP platforms for sun target.

Change-Id: If9a6c99f15add5fa7d86bb821587dc971bd87619
Signed-off-by: Jayasri Sampath Kumaran <quic_jsampath@quicinc.com>
2024-02-26 16:22:57 -05:00
qctecmdr
b5eceff19b Merge "ARM: dts: msm: updates demura version and size" 2024-02-24 21:08:58 -08:00
qctecmdr
ed82833ab7 Merge "ARM: dts: msm: introduce disp cc memory region" 2024-02-23 23:25:25 -08:00
Jinfeng Gu
bd64dc56a2 ARM: dts: msm: add multiple timing nodes for nt37801 panel
This change add multiple timing nodes for nt37801 on sun target.

Change-Id: I36f3271c86a6765ca62bda60b23954d7d5efbf14
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
2024-02-21 10:36:31 +08:00
Yuchao Ma
5521491e02 ARM: dts: msm: updates demura version and size
The change updates demura version and size.

Change-Id: Ie3a71c6a04f38054d4a192c1b538fb53aa02e135
Signed-off-by: Yuchao Ma <quic_yuchaom@quicinc.com>
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
2024-02-20 15:32:33 -08:00
Veera Sundaram Sankaran
c64196b0d0 ARM: dts: msm: modify cont-splash memory region on pakala target
Modify the continuous splash memory region to match UEFI configured
address. Add a gap in HLOS unsecure context-bank to avoid using
the splash memory region.

Change-Id: Ifa7927b8ecccd0542ef3f37cf781a97f594102b3
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2024-02-19 21:11:48 -08:00
qctecmdr
364acbdced Merge "ARM: dts: msm: enable mmrm on sun target" 2024-02-17 21:05:03 -08:00
Akash Gajjar
10aa7ec653 ARM: dts: msm: Add trustedvm device tree support for Sun MTP-V8 target
Add the trusted VM devicetree nodes for Sun MTP-V8 target.

Change-Id: I404667e153c7295b5868cac18c013dd084e18a1f
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
2024-02-14 05:36:01 -08:00
qctecmdr
27c9eab566 Merge "ARM: dts: msm: enable dfps on sun target" 2024-02-12 15:56:47 -08:00
qctecmdr
8aaee4a029 Merge "ARM: dts: msm: add entry for ssip fuse configuration" 2024-02-12 15:56:47 -08:00
qctecmdr
3f8c026647 Merge "ARM: dts: msm: update iommu address range for sun target" 2024-02-12 15:56:47 -08:00